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mb/google/nissa/var/pujjo: Enable PCIe port 4 for WLAN 

Pujjo support WLAN device, enable PCIe port 4 for WLAN device

BUG=b:239899932
TEST=Build and boot on pujjo

Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com>
Change-Id: Ic8b7240941cf87a4f27963d50fffe28875114a81
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66073
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Leo Chou 2022-07-22 15:55:59 +08:00 committed by Paul Fagerburg
parent 7127013f7c
commit f92ea61e84
1 changed files with 20 additions and 0 deletions
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20
src/mainboard/google/brya/variants/pujjo/overridetree.cb
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@ -13,6 +13,7 @@ chip soc/intel/alderlake
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC Camera register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC Camera
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
# Configure external V1P05/Vnn/VnnSx Rails # Configure external V1P05/Vnn/VnnSx Rails
@ -228,6 +229,18 @@ chip soc/intel/alderlake
device i2c 0x2c on end device i2c 0x2c on end
end end
end end
device ref pcie_rp4 on
# PCIe 4 WLAN
register "pch_pcie_rp[PCH_RP(4)]" = "{
.clk_src = 2,
.clk_req = 2,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
chip drivers/wifi/generic
register "wake" = "GPE0_DW1_03"
device pci 00.0 on end
end
end
device ref pcie_rp7 on device ref pcie_rp7 on
# Enable SD Card PCIe 7 using clk 3 # Enable SD Card PCIe 7 using clk 3
register "pch_pcie_rp[PCH_RP(7)]" = "{ register "pch_pcie_rp[PCH_RP(7)]" = "{
@ -314,6 +327,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""USB2 Bluetooth"" register "desc" = ""USB2 Bluetooth""
register "type" = "UPC_TYPE_INTERNAL" register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""CNVi Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" = register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port10 on end device ref usb2_port10 on end