device/oprom: Replace CONFIG() preprocessor statements
Change-Id: I7737b5f2a5c2598af68f2bca769232413f343a39 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34082 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com>
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@ -85,7 +85,9 @@ typedef struct {
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u8 devfn;
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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struct device* dev;
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u64 puid; /* unused */
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#else
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void *dev;
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u64 puid;
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phandle_t phandle;
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ihandle_t ihandle;
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@ -343,7 +343,8 @@ handleInt1a(void)
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{
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// function number in AX
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u8 bus, devfn, offs;
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struct device* dev;
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struct device *dev = NULL;
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switch (M.x86.R_AX) {
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case 0xb101:
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// Installation check
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@ -361,30 +362,28 @@ handleInt1a(void)
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//
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DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n",
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__func__, M.x86.R_AX);
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/* FixME: support SI != 0 */
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#if CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES)
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dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0);
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if (dev != 0) {
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Find Device --> 0x%04x\n",
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__func__, M.x86.R_AX, M.x86.R_BX);
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M.x86.R_BH = dev->bus->secondary;
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M.x86.R_BL = dev->path.pci.devfn;
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M.x86.R_AH = 0x00; // return code: success
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CLEAR_FLAG(F_CF);
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#else
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/* FixME: support SI != 0 */
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// only allow the device to find itself...
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if ((M.x86.R_CX == bios_device.pci_device_id)
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&& (M.x86.R_DX == bios_device.pci_vendor_id)
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// device index must be 0
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&& (M.x86.R_SI == 0)) {
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CLEAR_FLAG(F_CF);
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M.x86.R_AH = 0x00; // return code: success
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dev = bios_device.dev;
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M.x86.R_BH = bios_device.bus;
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M.x86.R_BL = bios_device.devfn;
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#endif
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} else {
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} else if (CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES)) {
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dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0);
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if (dev != NULL) {
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M.x86.R_BH = dev->bus->secondary;
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M.x86.R_BL = dev->path.pci.devfn;
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Find Device --> 0x%04x\n",
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__func__, M.x86.R_AX, M.x86.R_BX);
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}
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}
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if (dev == NULL) {
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DEBUG_PRINTF_INTR
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("%s(): function %x: invalid device/vendor/device index! (%04x/%04x/%02x expected: %04x/%04x/00)\n",
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__func__, M.x86.R_AX, M.x86.R_CX, M.x86.R_DX,
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@ -393,7 +392,10 @@ handleInt1a(void)
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SET_FLAG(F_CF);
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M.x86.R_AH = 0x86; // return code: device not found
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return;
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}
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CLEAR_FLAG(F_CF);
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M.x86.R_AH = 0x00; // return code: success
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break;
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case 0xb108: //read configuration byte
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case 0xb109: //read configuration word
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@ -403,18 +405,16 @@ handleInt1a(void)
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offs = M.x86.R_DI;
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DEBUG_PRINTF_INTR("%s(): function: %x: PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
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__func__, M.x86.R_AX, bus, devfn, offs);
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#if CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES)
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dev = dev_find_slot(bus, devfn);
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DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n",
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if ((bus == bios_device.bus) && (devfn == bios_device.devfn)) {
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dev = bios_device.dev;
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} else if (CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES)) {
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dev = dev_find_slot(bus, devfn);
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DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n",
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__func__, M.x86.R_AX, dev_path(dev));
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if (dev == 0) {
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// fail accesses to non-existent devices...
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#else
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dev = bios_device.dev;
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if ((bus != bios_device.bus)
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|| (devfn != bios_device.devfn)) {
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// fail accesses to any device but ours...
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#endif
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}
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if (dev == NULL) {
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printf
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("%s(): Config read access invalid device! bus: %02x (%02x), devfn: %02x (%02x), offs: %02x\n",
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__func__, bus, bios_device.bus, devfn,
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@ -423,57 +423,54 @@ handleInt1a(void)
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M.x86.R_AH = 0x87; //return code: bad pci register
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HALT_SYS();
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return;
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} else {
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switch (M.x86.R_AX) {
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case 0xb108:
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M.x86.R_CL =
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config8(dev, offs);
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#else
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(u8) rtas_pci_config_read(bios_device.
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puid, 1,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Read @%02x --> 0x%02x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CL);
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break;
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case 0xb109:
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M.x86.R_CX =
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config16(dev, offs);
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#else
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(u16) rtas_pci_config_read(bios_device.
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puid, 2,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Read @%02x --> 0x%04x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CX);
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break;
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case 0xb10a:
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M.x86.R_ECX =
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config32(dev, offs);
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#else
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(u32) rtas_pci_config_read(bios_device.
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puid, 4,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Read @%02x --> 0x%08x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_ECX);
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break;
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}
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CLEAR_FLAG(F_CF);
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M.x86.R_AH = 0x0; // return code: success
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}
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switch (M.x86.R_AX) {
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case 0xb108:
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M.x86.R_CL =
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config8(dev, offs);
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#else
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(u8) rtas_pci_config_read(bios_device.puid, 1,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Read @%02x --> 0x%02x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CL);
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break;
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case 0xb109:
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M.x86.R_CX =
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config16(dev, offs);
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#else
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(u16) rtas_pci_config_read(bios_device.puid, 2,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Read @%02x --> 0x%04x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CX);
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break;
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case 0xb10a:
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M.x86.R_ECX =
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_read_config32(dev, offs);
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#else
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(u32) rtas_pci_config_read(bios_device.puid, 4,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Read @%02x --> 0x%08x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_ECX);
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break;
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}
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CLEAR_FLAG(F_CF);
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M.x86.R_AH = 0x0; // return code: success
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break;
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case 0xb10b: //write configuration byte
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case 0xb10c: //write configuration word
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@ -481,9 +478,12 @@ handleInt1a(void)
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bus = M.x86.R_BH;
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devfn = M.x86.R_BL;
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offs = M.x86.R_DI;
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if ((bus != bios_device.bus)
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|| (devfn != bios_device.devfn)) {
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// fail accesses to any device but ours...
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if ((bus == bios_device.bus) && (devfn == bios_device.devfn)) {
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dev = bios_device.dev;
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}
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if (dev == NULL) {
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printf
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("%s(): Config read access invalid! bus: %x (%x), devfn: %x (%x), offs: %x\n",
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__func__, bus, bios_device.bus, devfn,
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@ -492,48 +492,48 @@ handleInt1a(void)
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M.x86.R_AH = 0x87; //return code: bad pci register
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HALT_SYS();
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return;
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} else {
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switch (M.x86.R_AX) {
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case 0xb10b:
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config8(bios_device.dev, offs, M.x86.R_CL);
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#else
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rtas_pci_config_write(bios_device.puid, 1, bus,
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devfn, offs, M.x86.R_CL);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Write @%02x <-- 0x%02x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CL);
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break;
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case 0xb10c:
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config16(bios_device.dev, offs, M.x86.R_CX);
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#else
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rtas_pci_config_write(bios_device.puid, 2, bus,
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devfn, offs, M.x86.R_CX);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Write @%02x <-- 0x%04x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CX);
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break;
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case 0xb10d:
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);
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#else
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rtas_pci_config_write(bios_device.puid, 4, bus,
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devfn, offs, M.x86.R_ECX);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Write @%02x <-- 0x%08x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_ECX);
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break;
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}
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CLEAR_FLAG(F_CF);
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M.x86.R_AH = 0x0; // return code: success
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}
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switch (M.x86.R_AX) {
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case 0xb10b:
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config8(dev, offs, M.x86.R_CL);
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#else
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rtas_pci_config_write(bios_device.puid, 1, bus,
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devfn, offs, M.x86.R_CL);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Write @%02x <-- 0x%02x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CL);
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break;
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case 0xb10c:
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config16(dev, offs, M.x86.R_CX);
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#else
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rtas_pci_config_write(bios_device.puid, 2, bus,
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devfn, offs, M.x86.R_CX);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Write @%02x <-- 0x%04x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_CX);
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break;
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case 0xb10d:
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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pci_write_config32(dev, offs, M.x86.R_ECX);
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#else
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rtas_pci_config_write(bios_device.puid, 4, bus,
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devfn, offs, M.x86.R_ECX);
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#endif
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DEBUG_PRINTF_INTR
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("%s(): function %x: PCI Config Write @%02x <-- 0x%08x\n",
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__func__, M.x86.R_AX, offs,
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M.x86.R_ECX);
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break;
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}
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CLEAR_FLAG(F_CF);
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M.x86.R_AH = 0x0; // return code: success
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break;
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default:
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printf("%s(): unknown function (%x) for int1a handler.\n",
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@ -431,18 +431,16 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
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offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly
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DEBUG_PRINTF_INTR("%s(): PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
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__func__, bus, devfn, offs);
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#if CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES)
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dev = dev_find_slot(bus, devfn);
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DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n",
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__func__, dev_path(dev));
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if (dev == 0) {
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// fail accesses to non-existent devices...
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#else
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dev = bios_device.dev;
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if ((bus != bios_device.bus)
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|| (devfn != bios_device.devfn)) {
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// fail accesses to any device but ours...
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#endif
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if ((bus == bios_device.bus) && (devfn == bios_device.devfn)) {
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dev = bios_device.dev;
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} else if (CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES)) {
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dev = dev_find_slot(bus, devfn);
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DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n",
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__func__, dev_path(dev));
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}
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if (dev == NULL) {
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printf
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("%s(): Config read access invalid device! bus: %02x (%02x), devfn: %02x (%02x), offs: %02x\n",
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__func__, bus, bios_device.bus, devfn,
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@ -450,8 +448,9 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
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SET_FLAG(F_CF);
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HALT_SYS();
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return 0;
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} else {
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#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
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}
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if (CONFIG(PCI_OPTION_ROM_RUN_YABEL)) {
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switch (size) {
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case 1:
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rval = pci_read_config8(dev, offs);
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@ -463,23 +462,21 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
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rval = pci_read_config32(dev, offs);
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break;
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}
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#else
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rval =
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(u32) rtas_pci_config_read(bios_device.
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puid, size,
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bus, devfn,
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offs);
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#endif
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DEBUG_PRINTF_IO
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("%s(%04x) PCI Config Read @%02x, size: %d --> 0x%08x\n",
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__func__, addr, offs, size, rval);
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} else {
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rval = (u32) rtas_pci_config_read(bios_device.puid, size, bus, devfn, offs);
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}
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DEBUG_PRINTF_IO
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("%s(%04x) PCI Config Read @%02x, size: %d --> 0x%08x\n",
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__func__, addr, offs, size, rval);
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return rval;
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}
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void
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pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size)
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{
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struct device *dev = NULL;
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u32 port_cf8_val = 0;
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u8 bus, devfn, offs;
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@ -498,37 +495,39 @@ pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size)
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devfn = (port_cf8_val & 0x0000FF00) >> 8;
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offs = (port_cf8_val & 0x000000FF);
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offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly
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if ((bus != bios_device.bus)
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|| (devfn != bios_device.devfn)) {
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// fail accesses to any device but ours...
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if ((bus == bios_device.bus) && (devfn == bios_device.devfn)) {
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dev = bios_device.dev;
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} else {
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printf
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("Config write access invalid! PCI device %x:%x.%x, offs: %x\n",
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bus, devfn >> 3, devfn & 7, offs);
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#if !CONFIG(YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG)
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if (CONFIG(YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG))
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return;
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// fail accesses to any device but ours...
|
||||
HALT_SYS();
|
||||
#endif
|
||||
} else {
|
||||
#if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
|
||||
}
|
||||
|
||||
if (CONFIG(PCI_OPTION_ROM_RUN_YABEL)) {
|
||||
switch (size) {
|
||||
case 1:
|
||||
pci_write_config8(bios_device.dev, offs, val);
|
||||
pci_write_config8(dev, offs, val);
|
||||
break;
|
||||
case 2:
|
||||
pci_write_config16(bios_device.dev, offs, val);
|
||||
pci_write_config16(dev, offs, val);
|
||||
break;
|
||||
case 4:
|
||||
pci_write_config32(bios_device.dev, offs, val);
|
||||
pci_write_config32(dev, offs, val);
|
||||
break;
|
||||
}
|
||||
#else
|
||||
rtas_pci_config_write(bios_device.puid,
|
||||
size, bus, devfn, offs,
|
||||
val);
|
||||
#endif
|
||||
DEBUG_PRINTF_IO
|
||||
("%s(%04x) PCI Config Write @%02x, size: %d <-- 0x%08x\n",
|
||||
__func__, addr, offs, size, val);
|
||||
} else {
|
||||
rtas_pci_config_write(bios_device.puid, size, bus, devfn, offs, val);
|
||||
}
|
||||
|
||||
DEBUG_PRINTF_IO
|
||||
("%s(%04x) PCI Config Write @%02x, size: %d <-- 0x%08x\n",
|
||||
__func__, addr, offs, size, val);
|
||||
}
|
||||
|
||||
u8
|
||||
|
|
Loading…
Reference in New Issue