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mainboard/asrock/e350m1: Update CMOS layout to match SIO changes 

Change-Id: I3f1f33b50f788b6d57f1a7986c4bdb912426e4f0
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12125
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
Timothy Pearson 2015-10-21 15:27:02 -05:00 committed by Peter Stuge
parent 478575c049
commit f94ceb138f
1 changed files with 4 additions and 1 deletions
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5
src/mainboard/asrock/e350m1/cmos.layout
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@ -29,7 +29,7 @@ entries
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 multi_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 2 e 3 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
@ -49,6 +49,9 @@ enumerations
1 1 Enable 1 1 Enable
2 0 Enable 2 0 Enable
2 1 Disable 2 1 Disable
3 0 Off
3 1 On
3 2 Last
4 0 Fallback 4 0 Fallback
4 1 Normal 4 1 Normal
5 0 115200 5 0 115200