diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index 5a6050a2b9..3c484986d3 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -23,11 +23,25 @@
 #include <console/console.h>
 #include <program_loading.h>
 #include <soc/clock.h>
+#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/apbmisc.h>
 
 #include "pinmux.h"
 #include "power.h"
 
+static const struct pad_config uart_console_pads[] = {
+	/* Hard coded pad usage for UARTA. */
+	PAD_CFG_SFIO(KB_ROW9, 0, UA3),
+	PAD_CFG_SFIO(KB_ROW10, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UA3),
+	/*
+	 * Disable UART2 pads as they are default connected to UARTA controller.
+	 */
+	PAD_CFG_UNUSED(UART2_RXD),
+	PAD_CFG_UNUSED(UART2_TXD),
+	PAD_CFG_UNUSED(UART2_RTS_N),
+	PAD_CFG_UNUSED(UART2_CTS_N),
+};
+
 void main(void)
 {
 	// enable pinmux clamp inputs
@@ -38,18 +52,7 @@ void main(void)
 
 	clock_early_uart();
 
-	// Serial out, tristate off.
-	pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
-	// Serial in, tristate_on.
-	pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
-						 PINMUX_PULL_UP |
-						 PINMUX_INPUT_ENABLE);
-	// Mux some pins away from uart A.
-	pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
-			  PINMUX_UART2_CTS_N_FUNC_UB3 |
-			  PINMUX_INPUT_ENABLE);
-	pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
-			  PINMUX_UART2_RTS_N_FUNC_UB3);
+	soc_configure_pads(uart_console_pads, ARRAY_SIZE(uart_console_pads));
 
 	if (CONFIG_BOOTBLOCK_CONSOLE) {
 		console_init();