GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/intel/saddlebrook: Refactor to get rid of `pei_data` 

The SoC specific `struct pei_data` was filled with values that were
later only consumed by the mainboard code again. Avoid jumping through
this hoop and fill FSP UPDs directly.

Change-Id: I399dd89f85ccea43fdf90bd895e71324f4b409cc
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Nico Huber 2019-05-04 17:06:06 +02:00 committed by Patrick Georgi
parent 9b5b9e46b9
commit f98f8ebb8c
4 changed files with 4 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/intel/saddlebrook/Makefile.inc
View File

@ -17,6 +17,5 @@
subdirs-y += spd
bootblock-y += bootblock.c
romstage-y += pei_data.c
ramstage-y += ramstage.c

27
src/mainboard/intel/saddlebrook/pei_data.c
View File

@ -1,27 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
#include "spd/spd.h"
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
mainboard_fill_dq_map_data(&pei_data->dq_map);
mainboard_fill_dqs_map_data(&pei_data->dqs_map);
mainboard_fill_rcomp_res_data(&pei_data->RcompResistor);
mainboard_fill_rcomp_strength_data(&pei_data->RcompTarget);
}

20
src/mainboard/intel/saddlebrook/romstage.c
View File

@ -19,8 +19,6 @@
#include <fsp/api.h>
#include <string.h>
#include <soc/gpio.h>
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
#include <soc/pm.h>
#include <soc/romstage.h>
#include "spd/spd.h"
@ -38,8 +36,6 @@ void car_mainboard_pre_console_init(void)
void mainboard_romstage_entry(struct romstage_params *params)
{
post_code(0x31);
/* Fill out PEI DATA */
mainboard_fill_pei_data(params->pei_data);
romstage_common(params);
}
@ -67,18 +63,10 @@ void mainboard_memory_init_params(
* should be set in the FSP flash image and should not need to be
* changed.
*/
memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0],
sizeof(params->pei_data->dq_map[0]));
memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1],
sizeof(params->pei_data->dq_map[1]));
memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0],
sizeof(params->pei_data->dqs_map[0]));
memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1],
sizeof(params->pei_data->dqs_map[1]));
memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor,
sizeof(params->pei_data->RcompResistor));
memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget,
sizeof(params->pei_data->RcompTarget));
mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0);
mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0);
mainboard_fill_rcomp_res_data(&memory_params->RcompResistor);
mainboard_fill_rcomp_strength_data(&memory_params->RcompTarget);
/* update spd length*/
memory_params->MemorySpdDataLen = blk.len;

2
src/mainboard/intel/saddlebrook/spd/spd_util.c
View File

@ -15,8 +15,6 @@
#include <stdint.h>
#include <string.h>
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
#include "spd.h"
void mainboard_fill_dq_map_data(void *dq_map_ptr)