cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()

Newer CPUs/SoCs need to configure other features via the
IA32_FEATURE_CONTROL msr, such as SGX, which cannot be done if the
msr is already locked. Create separate functions for setting the
vmx flag and lock bit, and rename existing function to indicate that
the lock bit will be set in addition to vmx flag (per Kconfig).

This will allow Skylake/Kabylake (and others?) to use the common
VMX code without breaking SGX, while ensuring no change in functionality
to existing platforms which current set both together.

Test: build/boot each affected platform, ensure no change in functionality

Change-Id: Iee772fe87306b4729ca012cef8640d3858e2cb06
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30229
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2018-12-15 15:57:33 -06:00 committed by Patrick Georgi
parent c5ad267a37
commit f9aed65785
14 changed files with 46 additions and 22 deletions

View File

@ -7,9 +7,8 @@ config ENABLE_VMX
bool "Enable VMX for virtualization"
default y
config SET_VMX_LOCK_BIT
bool "Set lock bit after configuring VMX"
depends on ENABLE_VMX
config SET_IA32_FC_LOCK_BIT
bool "Set IA32_FEATURE_CONTROL lock bit"
default y
help
Although the Intel manual says you must set the lock bit in addition

View File

@ -15,7 +15,9 @@
#ifndef _CPU_INTEL_COMMON_H
#define _CPU_INTEL_COMMON_H
void set_vmx(void);
void set_vmx_and_lock(void);
void set_feature_ctrl_vmx(void);
void set_feature_ctrl_lock(void);
/*
* Init CPPC block with MSRs for Intel Enhanced Speed Step Technology.

View File

@ -21,12 +21,17 @@
#include <cpu/x86/msr.h>
#include "common.h"
void set_vmx(void)
void set_vmx_and_lock(void)
{
set_feature_ctrl_vmx();
set_feature_ctrl_lock();
}
void set_feature_ctrl_vmx(void)
{
msr_t msr;
uint32_t feature_flag;
int enable = IS_ENABLED(CONFIG_ENABLE_VMX);
int lock = IS_ENABLED(CONFIG_SET_VMX_LOCK_BIT);
feature_flag = cpu_get_feature_flags_ecx();
/* Check that the VMX is supported before reading or writing the MSR. */
@ -38,10 +43,10 @@ void set_vmx(void)
msr = rdmsr(IA32_FEATURE_CONTROL);
if (msr.lo & (1 << 0)) {
printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n",
printk(BIOS_ERR, "IA32_FEATURE_CONTROL is locked, so %s will do nothing\n",
__func__);
/* VMX locked. If we set it again we get an illegal
* instruction
/* IA32_FEATURE_CONTROL locked. If we set it again we get an
* illegal instruction
*/
return;
}
@ -59,14 +64,32 @@ void set_vmx(void)
wrmsr(IA32_FEATURE_CONTROL, msr);
printk(BIOS_DEBUG, "VMX status: %s\n",
enable ? "enabled" : "disabled");
}
void set_feature_ctrl_lock(void)
{
msr_t msr;
int lock = IS_ENABLED(CONFIG_SET_IA32_FC_LOCK_BIT);
msr = rdmsr(IA32_FEATURE_CONTROL);
if (msr.lo & (1 << 0)) {
printk(BIOS_ERR, "IA32_FEATURE_CONTROL is locked, so %s will do nothing\n",
__func__);
/* IA32_FEATURE_CONTROL locked. If we set it again we get an
* illegal instruction
*/
return;
}
if (lock) {
/* Set lock bit */
msr.lo |= (1 << 0);
wrmsr(IA32_FEATURE_CONTROL, msr);
}
printk(BIOS_DEBUG, "VMX status: %s, %s\n",
enable ? "enabled" : "disabled",
printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL status: %s\n",
lock ? "locked" : "unlocked");
}

View File

@ -148,7 +148,7 @@ static void model_406dx_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure Enhanced SpeedStep and Thermal Sensors */
configure_misc();

View File

@ -686,7 +686,7 @@ static void haswell_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states();

View File

@ -296,7 +296,7 @@ static void model_1067x_init(struct device *cpu)
init_timer();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states(quad);

View File

@ -99,7 +99,7 @@ static void model_106cx_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states();

View File

@ -333,7 +333,7 @@ static void model_2065x_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure Enhanced SpeedStep and Thermal Sensors */
configure_misc();

View File

@ -556,7 +556,7 @@ static void model_206ax_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states();

View File

@ -136,7 +136,7 @@ static void model_6ex_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states();

View File

@ -150,7 +150,7 @@ static void model_6fx_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states();

View File

@ -57,7 +57,7 @@ static void baytrail_core_init(struct device *cpu)
enable_turbo();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Set core MSRs */
reg_script_run(core_msr_script);

View File

@ -62,7 +62,7 @@ static void soc_core_init(struct device *cpu)
enable_turbo();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Set core MSRs */
reg_script_run(core_msr_script);

View File

@ -581,7 +581,7 @@ static void cpu_core_init(struct device *cpu)
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx();
set_vmx_and_lock();
/* Configure C States */
configure_c_states();