arch/riscv/romstage: Start from assembly
Without this it would use the exception handler from the previous stage. Change-Id: I79d875aca6cd0cffe482e4ebb5f388af0adf6aed Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68840 Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -96,7 +96,7 @@ endif #CONFIG_ARCH_BOOTBLOCK_RISCV
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################################################################################
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ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
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romstage-y += romstage.c
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romstage-y += romstage.S
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# Build the romstage
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@ -8,8 +8,4 @@ PHDRS
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to_load PT_LOAD;
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}
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#if ENV_BOOTBLOCK || ENV_RAMSTAGE
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ENTRY(_start)
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#else
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ENTRY(stage_entry)
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#endif
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@ -1,11 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __ARCH_STAGES_H
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#define __ARCH_STAGES_H
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#include <main_decl.h>
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void stage_entry(int hart_id, void *fdt)
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__attribute__((section(".text.stage_entry")));
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#endif
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@ -0,0 +1,38 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/encoding.h>
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#include <bits.h>
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#include <mcall.h>
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.section ".text._start", "ax", %progbits
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.globl _start
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_start:
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# initialize stack point for each hart
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# and the stack must be page-aligned.
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# 0xDEADBEEF used to check stack overflow
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csrr a0, mhartid
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la t0, _stack
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slli t1, a0, RISCV_PGSHIFT
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add t0, t0, t1
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li t1, 0xDEADBEEF
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STORE t1, 0(t0)
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li t1, RISCV_PGSIZE - HLS_SIZE
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add sp, t0, t1
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# initialize hart-local storage
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csrr a0, mhartid
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call hls_init
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li a0, CONFIG_RISCV_WORKING_HARTID
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call smp_pause
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# initialize entry of interrupt/exception
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la t0, trap_entry
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csrw mtvec, t0
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# clear any pending interrupts
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csrwi mip, 0
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# set up the mstatus register
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call mstatus_init
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tail main
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@ -1,21 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Entry points must be placed at the location the previous stage jumps
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* to (the lowest address in the stage image). This is done by giving
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* stage_entry() its own section in .text and placing it first in the
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* linker script.
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*/
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#include <arch/stages.h>
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#include <arch/smp/smp.h>
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#include <mcall.h>
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void stage_entry(int hart_id, void *fdt)
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{
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HLS()->hart_id = hart_id;
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HLS()->fdt = fdt;
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smp_pause(CONFIG_RISCV_WORKING_HARTID);
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main();
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}
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