GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

vc/amd/opensil/genoa_poc/openSIL: Add openSIL code as submodule 

This is a RW mirror of AMD's openSIL for Genoa with additions from
Arthur Heymans.

- origin/openSIL/main from
https://github.com/openSIL/openSIL.git

- origin/ArthurHeymans/64b_public from
https://github.com/ArthurHeymans/openSIL.git

The current main branch starts with Arthur's branch and adds 5 commits
from the AMD's openSIL repo.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I8917edf3a6a8493ffa9230902cafcc6234d3d571
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Martin Roth 2023-10-26 11:51:55 -06:00 committed by Felix Held
parent b34b4bf0dd
commit f9bc2c4699
2 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
.gitmodules vendored
View File

@ -65,3 +65,6 @@
path = util/goswid path = util/goswid
url = ../goswid url = ../goswid
branch = trunk branch = trunk
[submodule "src/vendorcode/amd/opensil/genoa_poc/opensil"]
path = src/vendorcode/amd/opensil/genoa_poc/opensil
url = ../opensil_genoa_poc.git

1
src/vendorcode/amd/opensil/genoa_poc/opensil Submodule

@ -0,0 +1 @@
Subproject commit d81517ec318455de7c18070340e891e120e22bfb