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soc/amd/common/iommu.c: Make sure iommu is enabled 

Don't rely on vendorcode to set enable bit on IOMMU.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com>
Change-Id: I1805a20656b7fb3915f8cc93c618ee074461840f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2023-06-15 10:59:49 +02:00 committed by Felix Held
parent 796b61c2a1
commit f9c12cec37
1 changed files with 14 additions and 1 deletions
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15
src/soc/amd/common/block/iommu/iommu.c
View File

@ -1,11 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <lib.h>
#define IOMMU_CAP_BASE_LO 0x44
#define IOMMU_CAP_BASE_HI 0x48
#define IOMMU_ENABLE (1 << 0)
static void iommu_read_resources(struct device *dev)
{
@ -23,6 +25,17 @@ static void iommu_read_resources(struct device *dev)
res->flags = IORESOURCE_MEM;
}
static void iommu_enable_resources(struct device *dev)
{
uint32_t base = pci_read_config32(dev, IOMMU_CAP_BASE_LO);
base |= IOMMU_ENABLE;
pci_write_config32(dev, IOMMU_CAP_BASE_LO, base);
printk(BIOS_DEBUG, "%s -> mmio enable: %08X", __func__,
pci_read_config32(dev, IOMMU_CAP_BASE_LO));
pci_dev_enable_resources(dev);
}
#if CONFIG(HAVE_ACPI_TABLES)
static const char *iommu_acpi_name(const struct device *dev)
{
@ -33,7 +46,7 @@ static const char *iommu_acpi_name(const struct device *dev)
struct device_operations amd_iommu_ops = {
.read_resources = iommu_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.enable_resources = iommu_enable_resources,
.ops_pci = &pci_dev_ops_pci,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_name = iommu_acpi_name,