mb/lenovo/t400: Implement hybrid graphic in romstage
The hybrid driver select by DRIVERS_LENOVO_HYBRID_GRAPHICS doesn't work for t400/t500. Replace it with a custom romstage implementation. Tested on Lenovo T500 with dual graphics: * Intel Native GFX init * AMD VBios * GNU Linux 4.8.13 * SeaBios as payload * Discrete is working (44 W) * Integrated is working (24 W) * Switchable is working (34 W) ** Both GPUs are enabled, with Intel being connected to the panel ** DRI_PRIME allows to use AMD GPU ** ACPI doesn't seem to work (no vgaswitcheroo) Depends on Change-Id: I4dc00005270240c048272b2e4f52ae46ba1c9422 Depends on Change-Id: If389016f3bb0c4c2fd0b826914997a87a9137201 Change-Id: I7496876e9b434d4a2388e1ede27ac604670339b7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18010 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
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@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
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select INTEL_INT15
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select SUPERIO_NSC_PC87382
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select DRIVERS_LENOVO_HYBRID_GRAPHICS
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config MAINBOARD_DIR
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string
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@ -15,3 +15,4 @@
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ramstage-y += dock.c
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ramstage-y += cstates.c
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romstage-y += hybrid_graphics.c
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@ -142,6 +142,7 @@ enumerations
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11 12 352M
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12 0 Integrated Only
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12 1 Discrete Only
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12 2 Switchable
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# -----------------------------------------------------------------
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checksums
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@ -0,0 +1,91 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 secunet Security Networks AG
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <string.h>
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#include <southbridge/intel/common/gpio.h>
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#include <northbridge/intel/gm45/gm45.h>
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#include <console/console.h>
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#include <option.h>
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#define HYBRID_GRAPHICS_INTEGRATED_ONLY 0
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#define HYBRID_GRAPHICS_DISCRETE_ONLY 1
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#define HYBRID_GRAPHICS_SWITCHABLE 2
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#define MUX_GPIO 22
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#define BCL_CTL_GPIO 19
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#define GFX_PWR_EN_GPIO 49
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#define HYBRID_DETECT_GPIO 21
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void hybrid_graphics_init(sysinfo_t *sysinfo);
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static bool hybrid_graphics_installed(void)
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{
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if (get_gpio(HYBRID_DETECT_GPIO))
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return false;
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else
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return true;
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}
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void hybrid_graphics_init(sysinfo_t *sysinfo)
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{
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/* Set default mode */
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uint8_t hybrid_graphics_mode =
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HYBRID_GRAPHICS_INTEGRATED_ONLY;
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if (!hybrid_graphics_installed()) {
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printk(BIOS_DEBUG, "Hybrid graphics not installed.\n");
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/* The display is not connected to a mux or switchable. */
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sysinfo->enable_igd = 1;
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sysinfo->enable_peg = 0;
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return;
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}
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printk(BIOS_DEBUG, "Hybrid graphics available: ");
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get_option(&hybrid_graphics_mode, "hybrid_graphics_mode");
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/* Select appropriate hybrid graphics device */
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switch (hybrid_graphics_mode) {
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default:
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case HYBRID_GRAPHICS_INTEGRATED_ONLY:
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printk(BIOS_DEBUG, "Activating Integrated Only.\n");
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set_gpio(MUX_GPIO, GPIO_LEVEL_LOW);
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set_gpio(BCL_CTL_GPIO, GPIO_LEVEL_LOW);
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set_gpio(GFX_PWR_EN_GPIO, GPIO_LEVEL_LOW);
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sysinfo->enable_igd = 1;
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sysinfo->enable_peg = 0;
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break;
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case HYBRID_GRAPHICS_DISCRETE_ONLY:
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printk(BIOS_DEBUG, "Activating Discrete Only.\n");
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set_gpio(MUX_GPIO, GPIO_LEVEL_HIGH);
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set_gpio(BCL_CTL_GPIO, GPIO_LEVEL_HIGH);
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set_gpio(GFX_PWR_EN_GPIO, GPIO_LEVEL_HIGH);
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sysinfo->enable_igd = 0;
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sysinfo->enable_peg = 1;
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break;
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case HYBRID_GRAPHICS_SWITCHABLE:
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printk(BIOS_DEBUG, "Activating Switchable (both GPUs).\n");
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set_gpio(MUX_GPIO, GPIO_LEVEL_LOW);
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set_gpio(BCL_CTL_GPIO, GPIO_LEVEL_LOW);
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set_gpio(GFX_PWR_EN_GPIO, GPIO_LEVEL_HIGH);
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sysinfo->enable_igd = 1;
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sysinfo->enable_peg = 1;
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break;
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}
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}
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@ -36,6 +36,8 @@
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#define LPC_DEV PCI_DEV(0, 0x1f, 0)
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#define MCH_DEV PCI_DEV(0, 0, 0)
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void hybrid_graphics_init(sysinfo_t *sysinfo);
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static void early_lpc_setup(void)
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{
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/* Set up SuperIO LPC forwards */
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@ -101,9 +103,13 @@ void mainboard_romstage_entry(unsigned long bist)
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memset(&sysinfo, 0, sizeof(sysinfo));
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sysinfo.spd_map[0] = 0x50;
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sysinfo.spd_map[2] = 0x51;
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sysinfo.enable_igd = 1;
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sysinfo.enable_peg = 0;
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get_gmch_info(&sysinfo);
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/* Configure graphic GPIOs.
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* Make sure there's a little delay between
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* setup_pch_gpios() and this call ! */
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hybrid_graphics_init(&sysinfo);
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raminit(&sysinfo, s3resume);
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const u32 deven = pci_read_config32(MCH_DEV, D0F0_DEVEN);
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