CBMEM x86: Unify get_cbmem_toc()

Remove any chipset-specific implementations and use arch-specific
implementation of get_cbmem_table() instead.

Change-Id: I338ee2c1bd51f5e517462115170dc926e040159e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3907
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

src/include/cbmem.h

@@ -141,7 +141,7 @@ void cbmem_init(u64 baseaddr, u64 size);
 int cbmem_reinit(u64 baseaddr);
 
 void get_cbmem_table(uint64_t *base, uint64_t *size);
-extern struct cbmem_entry *get_cbmem_toc(void);
+struct cbmem_entry *get_cbmem_toc(void);
 
 #endif /* CONFIG_DYNAMIC_CBMEM */
 

src/lib/cbmem.c

@@ -71,7 +71,7 @@ static void cbmem_locate_table(uint64_t *base, uint64_t *size)
 #endif
 }
 
-struct cbmem_entry *__attribute__((weak)) get_cbmem_toc(void)
+struct cbmem_entry *get_cbmem_toc(void)
 {
 	uint64_t base, size;
 	cbmem_locate_table(&base, &size);

src/mainboard/emulation/qemu-i440fx/memory.c

@@ -45,12 +45,7 @@ unsigned long get_top_of_ram(void)
 	return qemu_get_memory_size() * 1024;
 }
 
-#if !CONFIG_DYNAMIC_CBMEM
+#if CONFIG_DYNAMIC_CBMEM
-struct cbmem_entry *get_cbmem_toc(void)
-{
-	return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-#else
 void *cbmem_top(void)
 {
 	/* Top of cbmem is at lowest usable DRAM address below 4GiB. */

src/northbridge/intel/i945/raminit.c

@@ -28,11 +28,6 @@
 #include "i945.h"
 #include <cbmem.h>
 
-struct cbmem_entry *get_cbmem_toc(void)
-{
-	return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-
 /* Debugging macros. */
 #if CONFIG_DEBUG_RAM_SETUP
 #define PRINTK_DEBUG(x...)	printk(BIOS_DEBUG, x)

src/northbridge/intel/sandybridge/northbridge.c

@@ -58,14 +58,6 @@ unsigned long get_top_of_ram(void)
 	return (unsigned long) tom;
 }
 
-struct cbmem_entry *get_cbmem_toc(void)
-{
-	static struct cbmem_entry *toc = NULL;
-	if (!toc)
-		toc = (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-	return toc;
-}
-
 /* Reserve everything between A segment and 1MB:
  *
  * 0xa0000 - 0xbffff: legacy VGA

src/northbridge/intel/sandybridge/raminit.c

@@ -305,11 +305,6 @@ void sdram_initialize(struct pei_data *pei_data)
 		save_mrc_data(pei_data);
 }
 
-struct cbmem_entry *get_cbmem_toc(void)
-{
-	return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-
 unsigned long get_top_of_ram(void)
 {
 	/* Base of TSEG is top of usable DRAM */

src/northbridge/via/vx900/early_vx900.c

@@ -27,11 +27,6 @@ unsigned long get_top_of_ram(void)
 	return (((unsigned long)reg_tom) << 24) - (256 << 20);
 }
 
-struct cbmem_entry *get_cbmem_toc(void)
-{
-	return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-
 /**
  * \brief Enable accessing of PCI configuration space for all devices.
  *