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google/storm: prepare enabling vboot2 

This change sets up the list of source files for vboot2's
verstage without enabling it.

BRANCH=storm
BUG=chrome-os-partner:34161
TEST=not much testing yet, just successful compilation.

Change-Id: I4052c20795459bf0e057c0f0952226ea4a8c89f1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 48847ab8acfbe4b33d61d3d012c72c025cd8f364
Original-Change-Id: I1d7944e681f8a4b113a90ac028a0faba4423be89
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/234643
Reviewed-on: http://review.coreboot.org/9684
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Vadim Bendebury 2014-12-10 20:11:30 -08:00 committed by Patrick Georgi
parent 36417aa742
commit fa00ae7de6
3 changed files with 10 additions and 0 deletions
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1
src/mainboard/google/storm/Kconfig
View File

@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS
select COMMON_CBFS_SPI_WRAPPER select COMMON_CBFS_SPI_WRAPPER
select HAVE_HARD_RESET select HAVE_HARD_RESET
select MAINBOARD_HAS_BOOTBLOCK_INIT select MAINBOARD_HAS_BOOTBLOCK_INIT
select RETURN_FROM_VERSTAGE
select SPI_FLASH select SPI_FLASH
select SPI_FLASH_SPANSION select SPI_FLASH_SPANSION

3
src/mainboard/google/storm/Makefile.inc
View File

@ -20,6 +20,9 @@
bootblock-y += cdp.c bootblock-y += cdp.c
bootblock-y += reset.c bootblock-y += reset.c
verstage-y += cdp.c
verstage-y += chromeos.c
verstage-y += memlayout.ld
verstage-y += reset.c verstage-y += reset.c
romstage-y += romstage.c romstage-y += romstage.c

6
src/soc/qualcomm/ipq806x/Makefile.inc
View File

@ -23,6 +23,12 @@ bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c bootblock-y += timer.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c bootblock-$(CONFIG_DRIVERS_UART) += uart.c
verstage-y += clock.c
verstage-y += gpio.c
verstage-y += spi.c
verstage-y += timer.c
verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
romstage-y += clock.c romstage-y += clock.c
romstage-y += gpio.c romstage-y += gpio.c
romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_SPI_FLASH) += spi.c