google/storm: prepare enabling vboot2
This change sets up the list of source files for vboot2's verstage without enabling it. BRANCH=storm BUG=chrome-os-partner:34161 TEST=not much testing yet, just successful compilation. Change-Id: I4052c20795459bf0e057c0f0952226ea4a8c89f1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 48847ab8acfbe4b33d61d3d012c72c025cd8f364 Original-Change-Id: I1d7944e681f8a4b113a90ac028a0faba4423be89 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/234643 Reviewed-on: http://review.coreboot.org/9684 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS
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select COMMON_CBFS_SPI_WRAPPER
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select HAVE_HARD_RESET
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select MAINBOARD_HAS_BOOTBLOCK_INIT
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select RETURN_FROM_VERSTAGE
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select SPI_FLASH
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select SPI_FLASH_SPANSION
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@ -20,6 +20,9 @@
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bootblock-y += cdp.c
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bootblock-y += reset.c
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verstage-y += cdp.c
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verstage-y += chromeos.c
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verstage-y += memlayout.ld
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verstage-y += reset.c
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romstage-y += romstage.c
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@ -23,6 +23,12 @@ bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-y += timer.c
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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verstage-y += clock.c
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verstage-y += gpio.c
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verstage-y += spi.c
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verstage-y += timer.c
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verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
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romstage-y += clock.c
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romstage-y += gpio.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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