asus/f2a85-m: Sanitize #includes

Based on the same reasoning as this commit:
1d87dac hp/pavilion_m6_1035dx: Sanitize #includes

Change-Id: I383f79b5392ee1ca244e403f755213fa7b32c0af
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/5420
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

src/mainboard/asus/f2a85-m/BiosCallOuts.c

@@ -18,13 +18,11 @@
  */
 
 #include "agesawrapper.h"
-#include "amdlib.h"
 #include "BiosCallOuts.h"
-#include "Ids.h"
 #include "OptionsIds.h"
-#include "heapManager.h"
+
-#include "FchPlatform.h"
+#include <cbfs.h>
-#include "cbfs.h"
+#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
 
 STATIC CONST BIOS_CALLOUT_STRUCT BiosCallouts[] =
 {

src/mainboard/asus/f2a85-m/PlatformGnbPcie.c

@@ -17,12 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "heapManager.h"
 #include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
+
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
 
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
 

src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h

@@ -20,9 +20,8 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
+#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include "AGESA.h"
+#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
-#include "amdlib.h"
 
 VOID
 OemCustomizeInitEarly (

src/mainboard/asus/f2a85-m/acpi_tables.c

@@ -17,19 +17,16 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
+#include "agesawrapper.h"
-#include <string.h>
+
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <arch/ioapic.h>
+#include <console/console.h>
+#include <cpu/amd/amdfam15.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <cpu/x86/msr.h>
+#include <string.h>
-#include "agesawrapper.h"
-#include <cpu/amd/mtrr.h>
-#include <cpu/amd/amdfam15.h>
-
-#include "agesawrapper.h"
 
 #define DUMP_ACPI_TABLES 0
 

src/mainboard/asus/f2a85-m/agesawrapper.c

@@ -22,30 +22,21 @@
  *----------------------------------------------------------------------------------------
  */
 
-#include <stdint.h>
-#include <string.h>
-#include <cpu/x86/mtrr.h>
 #include "agesawrapper.h"
 #include "BiosCallOuts.h"
-#include "cpuRegisters.h"
-#include "cpuCacheInit.h"
-#include "cpuApicUtilities.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "Dispatcher.h"
-#include "cpuCacheInit.h"
-#include "amdlib.h"
 #include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
+
-#include "heapManager.h"
-#include "FchPlatform.h"
-#include "Fch.h"
-#include <cpu/amd/agesa/s3_resume.h>
-#include <cbmem.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <cbmem.h>
+#include <cpu/amd/agesa/s3_resume.h>
+#include <cpu/x86/mtrr.h>
 #include <device/device.h>
-#include "hudson.h"
+#include <southbridge/amd/agesa/hudson/hudson.h>
+#include <stdint.h>
+#include <string.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
 
 VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
 VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);

src/mainboard/asus/f2a85-m/agesawrapper.h

@@ -26,8 +26,7 @@
 #define _AGESAWRAPPER_H_
 
 #include <stdint.h>
-#include "Porting.h"
+#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-#include "AGESA.h"
 
 /*----------------------------------------------------------------------------------------
  *                   D E F I N I T I O N S    A N D    M A C R O S

src/mainboard/asus/f2a85-m/buildOpts.c

@@ -33,9 +33,21 @@
  * @e \$Revision: 23714 $   @e \$Date: 2009-12-09 17:28:37 -0600 (Wed, 09 Dec 2009) $
  */
 
-#include "AGESA.h"
+#include <vendorcode/amd/agesa/f15tn/AGESA.h>
-//#include "CommonReturns.h"
+
-#include "Filecode.h"
+/*  Include the files that instantiate the configuration definitions.  */
+#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
+#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
+/* the next two headers depend on heapManager.h */
+#include <vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h>
+/* These tables are optional and may be used to adjust memory timing settings */
+#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
+
 #define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
 
 /*  Select the cpu family.  */
@@ -251,22 +263,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
 
 #define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
 
-//#include  "VirgoInstall.h"
-
-/*  Include the files that instantiate the configuration definitions.  */
-#include "cpuRegisters.h"
-#include "cpuFamRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "AdvancedApi.h"
-#include "heapManager.h"
-#include "CreateStruct.h"
-#include "cpuFeatures.h"
-#include "Table.h"
-#include "CommonReturns.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "GnbInterface.h"
-
                   // This is the delivery package title, "BrazosPI"
                   // This string MUST be exactly 8 characters long
 #define AGESA_PACKAGE_STRING  {'c', 'b', '_', 'A', 'g', 'e', 's', 'a'}
@@ -364,7 +360,8 @@ GPIO_CONTROL   f2a85_m_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+/* Moving this include up will break AGESA. */
+#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
 
 /*----------------------------------------------------------------------------------------
  *                        CUSTOMER OVERIDES MEMORY TABLE
@@ -451,12 +448,6 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
   PSO_END
 };
 
-/*
- * These tables are optional and may be used to adjust memory timing settings
- */
-#include "mm.h"
-#include "mn.h"
-
 // Customer table
 UINT8 AGESA_MEM_TABLE_TN[][sizeof (MEM_TABLE_ALIAS)] =
 {

src/mainboard/asus/f2a85-m/get_bus_conf.c

@@ -17,14 +17,15 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include "agesawrapper.h"
+
 #include <console/console.h>
+#include <cpu/amd/amdfam15.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <string.h>
 #include <stdint.h>
 #include <stdlib.h>
-#include <cpu/amd/amdfam14.h>
+#include <string.h>
-#include "agesawrapper.h"
 
 /* Global variables for MB layouts and these will be shared by irqtable mptable
  * and acpi_tables busnum is default.

src/mainboard/asus/f2a85-m/irq_tables.c

@@ -17,12 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
 #include <arch/pirq_routing.h>
+#include <console/console.h>
 #include <cpu/amd/amdfam15.h>
+#include <stdint.h>
+#include <string.h>
 
 static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
 			    u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,

src/mainboard/asus/f2a85-m/mainboard.c

@@ -17,17 +17,17 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include "agesawrapper.h"
+#include "BiosCallOuts.h"
+
+#include <arch/acpi.h>
+#include <arch/io.h>
 #include <console/console.h>
+#include <cpu/amd/agesa/s3_resume.h>
+#include <cpu/x86/msr.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include "BiosCallOuts.h"
-#include <cpu/amd/mtrr.h>
 #include <device/pci_def.h>
-#include <arch/acpi.h>
-#include <cpu/amd/agesa/s3_resume.h>
-#include "agesawrapper.h"
 
 /*************************************************
  * enable the dedicated function in thatcher board.

src/mainboard/asus/f2a85-m/mptable.c

@@ -17,18 +17,16 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <string.h>
-#include <stdint.h>
-#include <cpu/amd/amdfam15.h>
 #include <arch/cpu.h>
+#include <arch/io.h>
+#include <arch/smp/mpspec.h>
+#include <cpu/amd/amdfam15.h>
 #include <cpu/x86/lapic.h>
+#include <device/pci.h>
+#include <stdint.h>
+#include <string.h>
 #include "southbridge/amd/agesa/hudson/hudson.h" /* pm_ioread() */
 
-
 //-#define IO_APIC_ID    CONFIG_MAX_PHYSICAL_CPUS + 1
 #define IO_APIC_ID    CONFIG_MAX_CPUS
 extern u8 bus_hudson[6];

src/mainboard/asus/f2a85-m/romstage.c

@@ -18,27 +18,27 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <stdint.h>
+#include "agesawrapper.h"
-#include <string.h>
+
-#include <device/pci_def.h>
+#include <arch/cpu.h>
-#include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/stages.h>
-#include <device/pnp_def.h>
+#include <cbmem.h>
-#include <arch/cpu.h>
-#include <cpu/x86/lapic.h>
 #include <console/console.h>
-#include <console/loglevel.h>
+#include <cpu/amd/agesa/s3_resume.h>
-#include "agesawrapper.h"
+#include <cpu/x86/bist.h>
-#include "cpu/x86/bist.h"
+#include <cpu/x86/lapic.h>
-#include "cpu/x86/lapic.h"
+#include <device/pci_def.h>
-#include "southbridge/amd/agesa/hudson/hudson.h"
+#include <device/pci_ids.h>
-#include "southbridge/amd/agesa/hudson/smbus.h"
+#include <device/pnp_def.h>
-#include "superio/ite/it8712f/early_serial.c"
+#include <southbridge/amd/agesa/hudson/hudson.h>
-#include "cpu/amd/agesa/s3_resume.h"
+#include <southbridge/amd/agesa/hudson/smbus.h>
-#include "src/drivers/pc80/i8254.c"
+#include <stdint.h>
-#include "src/drivers/pc80/i8259.c"
+#include <string.h>
-#include "cbmem.h"
+/* TODO: remove .c includes */
+#include <drivers/pc80/i8254.c>
+#include <drivers/pc80/i8259.c>
+#include <superio/ite/it8712f/early_serial.c>
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 void disable_cache_as_ram(void);