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mb/google/brya/var/skolas4es: Configure _DSC for camera devices 

Configure _DSC to ACPI_DEVICE_SLEEP_D3_COLD so that the driver skips
initial probe during kernel boot and prevent privacy LED blink.

BUG=b:194979741
BRANCH=firmware-brya-14505.B
TEST=Build and boot skolas to OS. Verify entries in SSDT.

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I3c32dd71ab454227b15913bda7f542230e5568db
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Bora Guvendik 2022-08-23 10:32:37 -07:00 committed by Martin Roth
parent 2cf52d80a6
commit fa03a9f059
1 changed files with 31 additions and 3 deletions
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34
src/mainboard/google/brya/variants/skolas4es/overridetree.cb
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@ -354,6 +354,7 @@ chip soc/intel/alderlake
register "link_freq[0]" = "360 * MHz" # 360 MHz
register "link_freq[1]" = "180 * MHz" # 180 MHz
register "remote_name" = ""IPU0""
register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
register "has_power_resource" = "1"
#Controls
@ -386,10 +387,23 @@ chip soc/intel/alderlake
register "acpi_name" = ""VCM0""
register "chip_name" = ""DW9768 VCM""
register "device_type" = "INTEL_ACPI_CAMERA_VCM"
register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC""
register "vcm_compat" = ""dongwoon,dw9768""
register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"
register "has_power_resource" = "1"
#Controls
register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
#_ON
register "on_seq.ops_cnt" = "1"
register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"
#_OFF
register "off_seq.ops_cnt" = "1"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 0C on end
end
chip drivers/intel/mipi_camera
@ -398,7 +412,6 @@ chip soc/intel/alderlake
register "chip_name" = ""AT24 EEPROM""
register "device_type" = "INTEL_ACPI_CAMERA_NVM"
register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC""
register "nvm_compat" = ""atmel,24c1024""
register "nvm_size" = "0x2800"
@ -406,6 +419,21 @@ chip soc/intel/alderlake
register "nvm_readonly" = "0x01"
register "nvm_width" = "0x10"
register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"
register "has_power_resource" = "1"
#Controls
register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
#_ON
register "on_seq.ops_cnt" = "1"
register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"
#_OFF
register "off_seq.ops_cnt" = "1"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 58 on end
end
end #I2C0