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libpayload dwc2: use bus addresses for buffers 

The address of the output buffer sent to the device should be
the bus address and not the virtual address.

BUG=chrome-os-partner:31438
TEST=tested on Pistachio FPGA and bring up board;
     USB works properly after this change
BRANCH=none

Change-Id: I5c9d199e17c3f4303095ad73f4980d32d04c6118
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 942c385c112c2a4e409da806548081d3e2f8f438
Original-Change-Id: I0c06196501a968a72cb3f2c7dd1027bb22cdaada
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/245387
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9455
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Ionela Voinescu 2015-02-02 15:35:44 +00:00 committed by Patrick Georgi
parent 8b52c93a73
commit fa14385ac5
1 changed files with 2 additions and 1 deletions
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3
payloads/libpayload/drivers/usb/dwc2.c
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@ -253,7 +253,8 @@ dwc2_transfer(endpoint_t *ep, int size, int pid, ep_dir_t dir,
memcpy(aligned_buf, data_buf, size); memcpy(aligned_buf, data_buf, size);
writel(hctsiz.d32, &reg->host.hchn[ch_num].hctsizn); writel(hctsiz.d32, &reg->host.hchn[ch_num].hctsizn);
writel((uint32_t)aligned_buf, &reg->host.hchn[ch_num].hcdman); writel((uint32_t)virt_to_bus(aligned_buf),
&reg->host.hchn[ch_num].hcdman);
writel(hcchar.d32, &reg->host.hchn[ch_num].hccharn); writel(hcchar.d32, &reg->host.hchn[ch_num].hccharn);
ret = wait_for_complete(ep, ch_num); ret = wait_for_complete(ep, ch_num);