coreboot-v2: Disable second serial port on Norwich
There isn't really any good reason to have the second serial port enabled on Norwich, and this makes the X DDC code stop working. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -139,7 +139,7 @@ chip northbridge/amd/lx
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register "com1_enable" = "1"
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register "com1_address" = "0x3F8"
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register "com1_irq" = "4"
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register "com2_enable" = "1"
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register "com2_enable" = "0"
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register "com2_address" = "0x2F8"
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register "com2_irq" = "3"
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register "unwanted_vpci[0]" = "0" # End of list has a zero
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