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coreboot-v2: Disable second serial port on Norwich 

There isn't really any good reason to have the second serial port
enabled on Norwich, and this makes the X DDC code stop working.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jordan Crouse 2008-05-09 15:32:46 +00:00
parent bbd337e364
commit fa36f5048f
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/amd/norwich/Config.lb
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@ -139,7 +139,7 @@ chip northbridge/amd/lx
register "com1_enable" = "1" register "com1_enable" = "1"
register "com1_address" = "0x3F8" register "com1_address" = "0x3F8"
register "com1_irq" = "4" register "com1_irq" = "4"
register "com2_enable" = "1" register "com2_enable" = "0"
register "com2_address" = "0x2F8" register "com2_address" = "0x2F8"
register "com2_irq" = "3" register "com2_irq" = "3"
register "unwanted_vpci[0]" = "0" # End of list has a zero register "unwanted_vpci[0]" = "0" # End of list has a zero