drv/intel/gma/opregion: Add function to set ASLS register

Add a new method to set ASLS register that holds the
ACPI OpRegion base address.

Change-Id: I4850500ac6d58f80b0eddc81514053c87774405c
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Patrick Rudolph 2017-06-20 17:49:53 +02:00
parent 54db255529
commit fa47042e1c
3 changed files with 51 additions and 0 deletions

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@ -19,6 +19,7 @@ ifeq ($(CONFIG_VGA_ROM_RUN),y)
ramstage-$(CONFIG_INTEL_INT15) += int15.c
endif
ramstage-$(CONFIG_INTEL_GMA_ACPI) += acpi.c
ramstage-$(CONFIG_INTEL_GMA_ACPI) += opregion.c
ifeq ($(CONFIG_MAINBOARD_USE_LIBGFXINIT),y)

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@ -0,0 +1,48 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2, or (at your option)
* any later verion of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include "opregion.h"
/* Write ASLS PCI register and prepare SWSCI register. */
void intel_gma_opregion_register(uintptr_t opregion)
{
device_t igd;
u16 reg16;
igd = dev_find_slot(0, PCI_DEVFN(0x2, 0));
if (!igd || !igd->enabled)
return;
/*
* Intel BIOS Specification
* Chapter 5.3.7 "Initialize Hardware State"
*/
pci_write_config32(igd, ASLS, opregion);
/*
* Intel's Windows driver relies on this:
* Intel BIOS Specification
* Chapter 5.4 "ASL Software SCI Handler"
*/
reg16 = pci_read_config16(igd, SWSCI);
reg16 &= ~GSSCIE;
reg16 |= SMISCISEL;
pci_write_config16(igd, SWSCI, reg16);
}

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@ -245,4 +245,6 @@ typedef struct {
u8 coreblock_biossignon[155];
} __attribute__((packed)) optionrom_vbt_t;
void intel_gma_opregion_register(uintptr_t opregion);
#endif /* _COMMON_GMA_H_ */