soc/intel/apollolake: update cache options for glk

On glk there's a 4MiB L2 cache all the time. Take advantage of that
by initializing a 1MiB cache-as-ram area.

BUG=b:72728953

Change-Id: Ia4e777a13607d8b70c05534b0a172f0ec6b04c51
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25645
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Aaron Durbin 2018-04-12 14:00:45 -06:00
parent cee8532ce3
commit fa529bb940
1 changed files with 2 additions and 0 deletions

View File

@ -143,6 +143,7 @@ config DCACHE_RAM_BASE
config DCACHE_RAM_SIZE
hex
default 0x100000 if SOC_INTEL_GLK
default 0xc0000
help
The size of the cache-as-ram region required during bootblock
@ -334,6 +335,7 @@ config CACHE_QOS_SIZE_PER_BIT
config L2_CACHE_SIZE
hex
default 0x400000 if SOC_INTEL_GLK
default 0x100000
config SPI_FLASH_INCLUDE_ALL_DRIVERS