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Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial. 

It's probably time to reconsider moving all fam10 boards to RAMBASE = 1M.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2010-10-20 19:23:22 +00:00
parent bda153be73
commit fa78d998d5
2 changed files with 0 additions and 31 deletions
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14
src/arch/i386/coreboot_ram.ld
View File

@ -106,13 +106,6 @@ SECTIONS
} }
_eheap = .; _eheap = .;
/* Some assertions to print human readable errors for certain linker
* error scenarios.
*/
/* Avoid running into 0xa0000-0xfffff */
_bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
/* The ram segment. This includes all memory used by the memory /* The ram segment. This includes all memory used by the memory
* resident copy of coreboot, except the tables that are produced on * resident copy of coreboot, except the tables that are produced on
* the fly, but including stack and heap. * the fly, but including stack and heap.
@ -125,13 +118,6 @@ SECTIONS
*/ */
_bogus = ASSERT( ( _eram_seg < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP"); _bogus = ASSERT( ( _eram_seg < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP");
/* This rule is only good for the few broken targets that still live
* below 1MB per default. Those are the Geode and VIA targets that come
* with their own version of real mode switches that can't live above
* 1MB. Once these are fixed, this rule should go away.
*/
_bogus = ASSERT( !((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN || CONFIG_HAVE_SMI_HANDLER) && ((_ram_seg<0xa0000) && (_eram_seg>0xa0000))), "Please increase CONFIG_RAMTOP and if still fail, try to set CONFIG_RAMBASE to 1M");
/* Discard the sections we don't need/want */ /* Discard the sections we don't need/want */
/DISCARD/ : { /DISCARD/ : {

17
src/cpu/x86/pae/pgtbl.c
View File

@ -54,24 +54,7 @@ void *map_2M_page(unsigned long page)
struct pde pdp[512]; struct pde pdp[512];
} __attribute__ ((packed)); } __attribute__ ((packed));
#if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
/*
pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,
and that region need to be used as vga font buffer. Please make sure set CONFIG_RAMTOP=0x200000 in MB Config
*/
struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M
unsigned x_end = 0x100000 + sizeof(struct pg_table) * CONFIG_MAX_CPUS;
#if (0x100000+20480*CONFIG_MAX_CPUS) > (CONFIG_RAMTOP)
#warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+20480*CONFIG_MAX_CPUS)\n"
#endif
if(x_end > (CONFIG_RAMTOP)) {
printk(BIOS_DEBUG, "map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end);
die("Can not go on");
}
#else
static struct pg_table pgtbl[CONFIG_MAX_CPUS] __attribute__ ((aligned(4096))); static struct pg_table pgtbl[CONFIG_MAX_CPUS] __attribute__ ((aligned(4096)));
#endif
static unsigned long mapped_window[CONFIG_MAX_CPUS]; static unsigned long mapped_window[CONFIG_MAX_CPUS];
unsigned long index; unsigned long index;
unsigned long window; unsigned long window;