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mb/starlabs/labtop/tgl: Nit - minor format change 

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I068c6e46d85d869afc72280509a03d5ff682b917
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65618
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2022-07-03 22:38:24 +01:00 committed by Felix Held
parent 2eb2dcebc7
commit fa7970aa81
1 changed files with 7 additions and 7 deletions
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14
src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
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@ -6,12 +6,12 @@ chip soc/intel/tigerlake
# Graphics # Graphics
# Not used but timings left for reference # Not used but timings left for reference
# register "panel_cfg" = "{ # register "panel_cfg" = "{
# .up_delay_ms = 2000, // T3 # .up_delay_ms = 2000, // T3
# .backlight_on_delay_ms = 0, // T7 # .backlight_on_delay_ms = 0, // T7
# .backlight_off_delay_ms = 2000, // T9 # .backlight_off_delay_ms = 2000, // T9
# .down_delay_ms = 500, // T10 # .down_delay_ms = 500, // T10
# .cycle_delay_ms = 500, // T12 # .cycle_delay_ms = 500, // T12
# .backlight_pwm_hz = 200, // PWM # .backlight_pwm_hz = 200, // PWM
# }" # }"
# FSP Memory # FSP Memory
@ -195,7 +195,7 @@ chip soc/intel/tigerlake
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
chip ec/starlabs/merlin chip ec/starlabs/merlin
# Port pair 4Eh/4Fh # Port pair 4Eh/4Fh