From fa963fd203fdcc1720fd4ae0879c3aff2d65bf51 Mon Sep 17 00:00:00 2001
From: Bill XIE <persmule@hardenedlinux.org>
Date: Wed, 12 Oct 2022 18:23:11 +0800
Subject: [PATCH] mb/hp/z220_series: Add missing PCI Interrupt Routing Table

HP Z220 series has PCI slot(s) but Interrupt Routing Table in ACPI
used to be missing, so one is added.

Note that the values within the added one are obtained from my own SFF
variant. If other variants have different values, please add them in a
manner similar to mb/gigabyte/ga-b75m-d3h/acpi/pci.asl.

Test result:
Log lines like

     pci 0000:00:1e.0: can't derive routing for PCI INT A
     ath9k 0000:04:00.0: PCI INT A: no GSI

disappeared from dmesg.

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I8522b25ac46db2054302c8f2418927c722b157e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68334
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/hp/z220_series/acpi/pci.asl | 35 +++++++++++++++++++++++
 src/mainboard/hp/z220_series/dsdt.asl     |  1 +
 2 files changed, 36 insertions(+)
 create mode 100644 src/mainboard/hp/z220_series/acpi/pci.asl

diff --git a/src/mainboard/hp/z220_series/acpi/pci.asl b/src/mainboard/hp/z220_series/acpi/pci.asl
new file mode 100644
index 0000000000..6277ac6f4e
--- /dev/null
+++ b/src/mainboard/hp/z220_series/acpi/pci.asl
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+// Intel PCI to PCI bridge 0:1e.0
+
+Device (PCIB)
+{
+	Name (_ADR, 0x001e0000)  // _ADR: Address
+	Name (_PRW, Package() { 13, 4 }) // Power Resources for Wake
+
+	Method (_PRT)  // _PRT: PCI Interrupt Routing Table
+	{
+		If (PICM) {
+			Return (Package() {
+				Package() { 0x0000ffff, 0, 0, 0x14 },
+				Package() { 0x0000ffff, 1, 0, 0x15 },
+				Package() { 0x0000ffff, 2, 0, 0x16 },
+				Package() { 0x0000ffff, 3, 0, 0x17 },
+				Package() { 0x0001ffff, 0, 0, 0x15 },
+				Package() { 0x0001ffff, 1, 0, 0x16 },
+				Package() { 0x0001ffff, 2, 0, 0x17 },
+				Package() { 0x0001ffff, 3, 0, 0x14 },
+			})
+		}
+		Return (Package() {
+			Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
+			Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
+			Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKG, 0 },
+			Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKH, 0 },
+			Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
+			Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKG, 0 },
+			Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKH, 0 },
+			Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },
+		})
+	}
+}
diff --git a/src/mainboard/hp/z220_series/dsdt.asl b/src/mainboard/hp/z220_series/dsdt.asl
index af4f3eacf9..57149b75b1 100644
--- a/src/mainboard/hp/z220_series/dsdt.asl
+++ b/src/mainboard/hp/z220_series/dsdt.asl
@@ -23,6 +23,7 @@ DefinitionBlock(
 		{
 			#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
 			#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+			#include "acpi/pci.asl"
 		}
 	}
 }