mb/google/hatch/var/jinlon: Tune i2c frequency under 400 KHz
Tuning i2c frequency for jinlon: I2C0: 392.7 KHz I2C1: 390 KHz I2C3: unused I2C4: 388.8 KHz BUG=b:154900217 BRANCH=hatch TEST=emerge-hatch coreboot chromeos-bootimage, and measured with scope Change-Id: I9b186193f34027d03dd349cf1e29bb266b167383 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40688 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -46,15 +46,18 @@ chip soc/intel/cannonlake
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},
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 30,
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.fall_time_ns = 15,
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 20,
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.fall_time_ns = 25,
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},
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 40,
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.fall_time_ns = 60,
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},
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}"
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