From fafcb749b4c71af6bc0db8f102dcf2c8a256a377 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Thu, 20 Jan 2022 21:28:31 +0000 Subject: [PATCH] soc/intel/apl: Use Kconfig to enable CseRbp This patch makes SKIP_CSE_RBP=y default for Apollo Lake if Boot Device is memory mapped and ensures SkipCseRbp UPD is guarded against this config. Signed-off-by: Sean Rhodes Change-Id: Ifd01a25443e2582a90529e55be8d34a88342a103 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61282 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/apollolake/Kconfig | 9 +++++++++ src/soc/intel/apollolake/romstage.c | 9 +-------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 38e7491537..f9ad4d63f0 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -117,6 +117,15 @@ config CPU_SPECIFIC_OPTIONS # provide a custom media driver that facilitates mapping select X86_CUSTOM_BOOTMEDIA +config SKIP_CSE_RBP + bool + default y if BOOT_DEVICE_MEMORY_MAPPED + help + Tell CSE we do not need to use Ring Buffer Protocol (RBP) to fetch + firmware for us if we are using memory-mapped SPI. This lets CSE + state machine transition to next boot state, so that it can function + as designed. + config DISABLE_HECI1_AT_PRE_BOOT default y diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index c4d7977c41..08543b1ea7 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -293,14 +293,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) /* Do NOT let FSP do any GPIO pad configuration */ mupd->FspmConfig.PreMemGpioTablePtr = (uintptr_t) NULL; - /* - * Tell CSE we do not need to use Ring Buffer Protocol (RBP) to fetch - * firmware for us if we are using memory-mapped SPI. This lets CSE - * state machine transition to next boot state, so that it can function - * as designed. - */ - mupd->FspmConfig.SkipCseRbp = - CONFIG(BOOT_DEVICE_MEMORY_MAPPED); + mupd->FspmConfig.SkipCseRbp = CONFIG(SKIP_CSE_RBP); /* * Converged Security Engine (CSE) has secure storage functionality.