soc/intel/icelake: Set FSP_TEMP_RAM_STACK unconditionally

Icelake default selects PLATFORM_USES_FSP2_1 which means stack will be shared
between FSP and coreboot (CONFIG_FSP_USES_CB_STACK) hence no need to have any
other guard to assign FSP_TEMP_RAM_SIZE.

Change-Id: Idbe393f7a63ad10f1ad3c9e7248593cf8eb115d9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36628
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2019-11-05 18:30:05 +05:30
parent 6a657c2646
commit fb2a9d5ed8
1 changed files with 0 additions and 1 deletions

View File

@ -78,7 +78,6 @@ config DCACHE_BSP_STACK_SIZE
config FSP_TEMP_RAM_SIZE
hex
depends on FSP_USES_CB_STACK
default 0x10000
help
The amount of anticipated heap usage in CAR by FSP.