drop unused files
Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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/*
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============================================================
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(c) Advanced Micro Devices, Inc., 2004-2005
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The enclosed microcode is intended to be used with AMD
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Microprocessors. You may copy, view and install the
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enclosed microcode only for development and deployment of
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firmware, BIOS, or operating system code for computer
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systems that contain AMD processors. You are not
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authorized to use the enclosed microcode for any other
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purpose.
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THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR
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IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
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WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT,
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TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES
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ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
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AMD does not assume any responsibility for any errors which
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may appear in this microcode or any other related
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information provided to you by AMD, or result from use of
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this microcode. AMD is not obligated to furnish, support,
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or make any further information, software, technical
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information, know-how, or show-how available related to this
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microcode.
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The microcode is provided with "RESTRICTED RIGHTS." Use,
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duplication, or disclosure by the U.S. Government is subject
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to the restrictions as set forth in FAR 52.227-14 and
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DFAR252.227-7013, et seq., or its successor. Use of the
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microcode by the U.S. Government constitutes
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acknowledgement of AMD's proprietary rights in them.
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============================================================
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*/
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
|
@ -1,165 +0,0 @@
|
||||||
/*
|
|
||||||
============================================================
|
|
||||||
(c) Advanced Micro Devices, Inc., 2004-2008
|
|
||||||
|
|
||||||
The enclosed microcode is intended to be used with AMD
|
|
||||||
Microprocessors. You may copy, view and install the
|
|
||||||
enclosed microcode only for development and deployment of
|
|
||||||
firmware, BIOS, or operating system code for computer
|
|
||||||
systems that contain AMD processors. You are not
|
|
||||||
authorized to use the enclosed microcode for any other
|
|
||||||
purpose.
|
|
||||||
|
|
||||||
THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR
|
|
||||||
IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
|
|
||||||
WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT,
|
|
||||||
TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES
|
|
||||||
ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
|
|
||||||
AMD does not assume any responsibility for any errors which
|
|
||||||
may appear in this microcode or any other related
|
|
||||||
information provided to you by AMD, or result from use of
|
|
||||||
this microcode. AMD is not obligated to furnish, support,
|
|
||||||
or make any further information, software, technical
|
|
||||||
information, know-how, or show-how available related to this
|
|
||||||
microcode.
|
|
||||||
|
|
||||||
The microcode is provided with "RESTRICTED RIGHTS." Use,
|
|
||||||
duplication, or disclosure by the U.S. Government is subject
|
|
||||||
to the restrictions as set forth in FAR 52.227-14 and
|
|
||||||
DFAR252.227-7013, et seq., or its successor. Use of the
|
|
||||||
microcode by the U.S. Government constitutes
|
|
||||||
acknowledgement of AMD's proprietary rights in them.
|
|
||||||
============================================================
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
0x08, 0x20, 0x30, 0x04, 0x83, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00,
|
|
||||||
0xA8, 0x88, 0x43, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
||||||
0x22, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x70, 0x09, 0x00, 0x00,
|
|
||||||
0x49, 0x01, 0x00, 0x00, 0x8B, 0x01, 0x00, 0x00, 0xC1, 0x08, 0x00, 0x00,
|
|
||||||
0xAA, 0x0B, 0x00, 0x00, 0x56, 0x0F, 0x00, 0x00, 0x9E, 0x0B, 0x00, 0x00,
|
|
||||||
0x70, 0x0C, 0x00, 0x00, 0x2A, 0xFF, 0xFF, 0x29, 0xC3, 0x5F, 0xD0, 0xC1,
|
|
||||||
0xBD, 0xFF, 0xFF, 0xB3, 0x0F, 0xFF, 0x7E, 0xFD, 0xF6, 0x1F, 0xF8, 0x57,
|
|
||||||
0x3C, 0xBC, 0x63, 0x2D, 0x80, 0x96, 0xD6, 0x00, 0xAA, 0xFF, 0xEF, 0xAF,
|
|
||||||
0xE0, 0xD1, 0x9F, 0x15, 0x57, 0xEF, 0xFF, 0xFF, 0xEA, 0x87, 0x7F, 0xBF,
|
|
||||||
0x03, 0xFA, 0x0F, 0xFC, 0xFC, 0x1F, 0xBE, 0xF5, 0x00, 0xE0, 0x4A, 0x4B,
|
|
||||||
0x7F, 0xC8, 0xFF, 0xF7, 0xB4, 0xF8, 0xF0, 0x2F, 0xFF, 0x1F, 0xC5, 0xFE,
|
|
||||||
0xC0, 0xCF, 0xC3, 0x3F, 0xFF, 0x03, 0xD4, 0xFF, 0x40, 0xC8, 0x0F, 0xEF,
|
|
||||||
0x35, 0x00, 0xD0, 0x00, 0xFB, 0xAF, 0xE5, 0xBF, 0xD7, 0xFA, 0x3F, 0xF8,
|
|
||||||
0xEB, 0x3F, 0x97, 0xFF, 0x9F, 0xEB, 0xFF, 0xE0, 0x97, 0xFF, 0x5E, 0xFE,
|
|
||||||
0x7F, 0xAE, 0xFA, 0x83, 0xC9, 0x1A, 0x00, 0x08, 0x8C, 0xFF, 0xAF, 0xF2,
|
|
||||||
0xFC, 0x53, 0xDD, 0x3F, 0xFB, 0xFF, 0x3F, 0xCB, 0xF0, 0x8F, 0x55, 0xFD,
|
|
||||||
0x5F, 0x53, 0x39, 0x00, 0x81, 0x3F, 0xB6, 0xD7, 0x10, 0x40, 0x0D, 0x00,
|
|
||||||
0x78, 0xF7, 0xFF, 0x07, 0x1F, 0x8E, 0xA9, 0xE8, 0xE5, 0xFF, 0xFA, 0x4F,
|
|
||||||
0x7F, 0xF8, 0x97, 0xFA, 0x80, 0xFF, 0xC0, 0x3F, 0xBF, 0xE1, 0x1F, 0xC0,
|
|
||||||
0x00, 0xFE, 0xBF, 0x07, 0x01, 0xFC, 0x67, 0xEB, 0x00, 0x07, 0xFE, 0xDE,
|
|
||||||
0xFF, 0x02, 0x00, 0xE0, 0xFD, 0x3F, 0xBC, 0x63, 0xFF, 0x8B, 0xFF, 0xFF,
|
|
||||||
0xF5, 0x7F, 0xF0, 0xEF, 0x03, 0x00, 0x3D, 0x57, 0xFF, 0x58, 0xFE, 0xBF,
|
|
||||||
0xAC, 0x7C, 0x83, 0x3F, 0xFF, 0x7F, 0xF9, 0xE2, 0x01, 0x7E, 0x1E, 0xFE,
|
|
||||||
0x1B, 0x0F, 0xE0, 0xBF, 0xF7, 0xF6, 0x3A, 0xF0, 0xAF, 0x01, 0x80, 0xB4,
|
|
||||||
0xFF, 0xFF, 0x00, 0xE7, 0xBB, 0x14, 0xF2, 0xC3, 0x38, 0xF8, 0x13, 0x18,
|
|
||||||
0x7F, 0x0C, 0xBA, 0x0E, 0x1F, 0xF8, 0x07, 0xF0, 0xFC, 0x03, 0xF8, 0x37,
|
|
||||||
0x7F, 0xD7, 0x00, 0x40, 0xFF, 0xEF, 0x3F, 0x80, 0xF1, 0x9F, 0x9B, 0x9C,
|
|
||||||
0xB6, 0xAF, 0x71, 0x00, 0x07, 0x7F, 0x40, 0xAF, 0x79, 0xFE, 0xFF, 0x57,
|
|
||||||
0x1E, 0xFE, 0x01, 0x7E, 0x00, 0xC0, 0x1F, 0x00, 0xC9, 0x7F, 0xE0, 0x1F,
|
|
||||||
0x75, 0xF0, 0xEF, 0xF0, 0x2D, 0xBF, 0xFE, 0xFF, 0xCF, 0xC3, 0x3F, 0xC0,
|
|
||||||
0x00, 0x8C, 0x6F, 0xE5, 0x3E, 0x07, 0xFD, 0x00, 0x00, 0xD0, 0xFF, 0x3D,
|
|
||||||
0x7F, 0x05, 0xF8, 0xFF, 0x5A, 0x3C, 0xF8, 0xE7, 0x7F, 0x02, 0x70, 0x01,
|
|
||||||
0x01, 0xD7, 0xE1, 0x8F, 0xFE, 0x80, 0xFF, 0x03, 0x2B, 0x80, 0x07, 0x7F,
|
|
||||||
0x09, 0x00, 0x48, 0x7D, 0x95, 0x03, 0x30, 0xE5, 0x03, 0x7A, 0x1D, 0xF8,
|
|
||||||
0xF7, 0xFF, 0xCB, 0xFF, 0xEF, 0xD5, 0x7F, 0xF0, 0x5E, 0x39, 0x00, 0x53,
|
|
||||||
0x3F, 0x80, 0xCF, 0x41, 0x40, 0x0D, 0x00, 0x30, 0xFF, 0xCA, 0x01, 0xC0,
|
|
||||||
0xFC, 0x01, 0xBD, 0x0E, 0xFF, 0xF7, 0x1F, 0xE0, 0xF8, 0x07, 0xF0, 0x7F,
|
|
||||||
0xFF, 0xFF, 0x5F, 0x95, 0xE0, 0xDF, 0xAB, 0xFF, 0xFE, 0xBF, 0x07, 0x00,
|
|
||||||
0x5C, 0x46, 0xFF, 0x01, 0x0F, 0xFE, 0xD8, 0x00, 0x60, 0x6F, 0xE0, 0x4F,
|
|
||||||
0x3A, 0xFC, 0x32, 0xD0, 0xCA, 0x7F, 0xE0, 0x9F, 0xF3, 0xF0, 0x0F, 0xF0,
|
|
||||||
0x00, 0x02, 0x50, 0x03, 0x4A, 0xFE, 0x83, 0xFF, 0x9F, 0x87, 0x7F, 0x80,
|
|
||||||
0x7F, 0x79, 0xEA, 0xFF, 0x7E, 0x1E, 0xFE, 0x01, 0x0F, 0xE0, 0xFF, 0x1B,
|
|
||||||
0x06, 0x38, 0xF0, 0xF7, 0x01, 0x00, 0x33, 0xA0, 0x7F, 0x00, 0xFF, 0x81,
|
|
||||||
0x80, 0x7F, 0xC3, 0x3F, 0xFE, 0x01, 0xFC, 0x07, 0x00, 0xFE, 0x0D, 0xFF,
|
|
||||||
0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xD7, 0x00, 0x40, 0x34,
|
|
||||||
0xC0, 0x3F, 0x80, 0xFF, 0x1F, 0xC0, 0xBF, 0xE1, 0x03, 0xFF, 0x00, 0xFE,
|
|
||||||
0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B,
|
|
||||||
0x9A, 0x6B, 0x00, 0x00, 0x7F, 0xF2, 0x1F, 0xC0, 0xF0, 0xED, 0x65, 0x7F,
|
|
||||||
0xFF, 0x81, 0x7F, 0x00, 0xC3, 0x3F, 0x80, 0x7F, 0xFC, 0x07, 0xFE, 0x01,
|
|
||||||
0x0D, 0xFF, 0x00, 0xFE, 0xF0, 0xFF, 0x3D, 0x00, 0xE0, 0x3B, 0x1A, 0x07,
|
|
||||||
0x78, 0xF0, 0x07, 0x04, 0x00, 0xF0, 0xFF, 0x7F, 0xF9, 0xE1, 0x1D, 0x0A,
|
|
||||||
0x00, 0x5E, 0xA3, 0x71, 0x80, 0x07, 0x7F, 0x40, 0x00, 0xF8, 0xFF, 0x1E,
|
|
||||||
0x8F, 0xF2, 0xFF, 0xFE, 0xDD, 0x3F, 0xFC, 0x43, 0x1F, 0xC0, 0x7F, 0xE0,
|
|
||||||
0xA5, 0xFF, 0xF0, 0x05, 0xFF, 0x04, 0xFC, 0xFF, 0x83, 0xAD, 0xC3, 0x2F,
|
|
||||||
0x0F, 0x00, 0xFC, 0x7F, 0xFF, 0xFF, 0x38, 0x80, 0x01, 0x7E, 0x1E, 0xFE,
|
|
||||||
0x2A, 0x07, 0x00, 0xBF, 0x07, 0xF0, 0x39, 0xE8, 0xD0, 0xBF, 0xBD, 0xFF,
|
|
||||||
0xDF, 0xEE, 0xFF, 0xE0, 0xBF, 0x07, 0x00, 0xFE, 0x06, 0xFE, 0x01, 0x0F,
|
|
||||||
0xFE, 0x76, 0x00, 0xDF, 0xF8, 0xFF, 0xAF, 0xF2, 0xFC, 0x03, 0xFC, 0x3C,
|
|
||||||
0x7D, 0x55, 0x0E, 0xC0, 0xD0, 0x0F, 0xE0, 0x73, 0xFF, 0xDF, 0x03, 0x00,
|
|
||||||
0x07, 0x03, 0xFD, 0x80, 0x6F, 0x7E, 0x3B, 0xFE, 0xF8, 0x0F, 0xFC, 0x03,
|
|
||||||
0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0x3F, 0xF0, 0x0F, 0x6F, 0xF8, 0x07, 0xF0,
|
|
||||||
0x80, 0xFE, 0xEF, 0x01, 0x00, 0xF8, 0x5F, 0x39, 0xCF, 0x41, 0x3F, 0x80,
|
|
||||||
0x7F, 0x14, 0xFB, 0xFF, 0x3F, 0x0F, 0xFF, 0x00, 0x07, 0xF0, 0x1F, 0xF8,
|
|
||||||
0xF8, 0x37, 0xFC, 0x03, 0x00, 0x40, 0xFF, 0xF7, 0x7F, 0x90, 0x7F, 0xFF,
|
|
||||||
0x68, 0xF1, 0xE1, 0x1F, 0xFF, 0x5F, 0xFE, 0x5F, 0x80, 0x9F, 0x87, 0x7F,
|
|
||||||
0xC6, 0x01, 0xF8, 0xAA, 0x01, 0x01, 0x0E, 0xFC, 0x6A, 0x00, 0x00, 0x8C,
|
|
||||||
0xE0, 0x1F, 0xC0, 0x7F, 0x0F, 0xE0, 0xDF, 0xF0, 0x81, 0x7F, 0x00, 0xFF,
|
|
||||||
0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC, 0xFF, 0x00, 0xFE, 0x0D,
|
|
||||||
0xD7, 0x35, 0x00, 0x70, 0x67, 0x2B, 0x07, 0xC0, 0xF0, 0x07, 0xF4, 0x3A,
|
|
||||||
0xFB, 0xFF, 0x7F, 0x00, 0xE1, 0x5D, 0x0B, 0xF9, 0xDC, 0x1C, 0xFC, 0x09,
|
|
||||||
0x87, 0x3F, 0x06, 0x5C, 0x90, 0xF3, 0x1A, 0x00, 0xB0, 0xFF, 0xFF, 0x0F,
|
|
||||||
0x3F, 0xBC, 0x63, 0xD1, 0xCA, 0xFF, 0xF4, 0x9F, 0x6F, 0xF0, 0x67, 0x95,
|
|
||||||
0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, 0x00, 0xFC, 0x7F, 0x0F,
|
|
||||||
0x7F, 0xF9, 0xDF, 0xFF, 0xFE, 0x0F, 0xFE, 0xBD, 0x07, 0xE0, 0x11, 0xE8,
|
|
||||||
0xF6, 0x7A, 0xF0, 0xF7, 0x3F, 0x80, 0xFF, 0xC0, 0xC0, 0xBF, 0xE1, 0x1F,
|
|
||||||
0x07, 0x00, 0xFE, 0xBF, 0xFF, 0x81, 0xFC, 0x2F, 0x00, 0x3F, 0x0F, 0xFF,
|
|
||||||
0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xE0, 0x1F, 0xC0, 0x7F,
|
|
||||||
0x0F, 0xE0, 0xDF, 0xF0, 0x23, 0x03, 0x00, 0x8E, 0x03, 0xFF, 0x00, 0xFE,
|
|
||||||
0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B,
|
|
||||||
0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, 0xFF, 0xEF, 0x01, 0x80,
|
|
||||||
|
|
||||||
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
|
@ -1,165 +0,0 @@
|
||||||
/*
|
|
||||||
============================================================
|
|
||||||
(c) Advanced Micro Devices, Inc., 2004-2008
|
|
||||||
|
|
||||||
The enclosed microcode is intended to be used with AMD
|
|
||||||
Microprocessors. You may copy, view and install the
|
|
||||||
enclosed microcode only for development and deployment of
|
|
||||||
firmware, BIOS, or operating system code for computer
|
|
||||||
systems that contain AMD processors. You are not
|
|
||||||
authorized to use the enclosed microcode for any other
|
|
||||||
purpose.
|
|
||||||
|
|
||||||
THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR
|
|
||||||
IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
|
|
||||||
WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT,
|
|
||||||
TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES
|
|
||||||
ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
|
|
||||||
AMD does not assume any responsibility for any errors which
|
|
||||||
may appear in this microcode or any other related
|
|
||||||
information provided to you by AMD, or result from use of
|
|
||||||
this microcode. AMD is not obligated to furnish, support,
|
|
||||||
or make any further information, software, technical
|
|
||||||
information, know-how, or show-how available related to this
|
|
||||||
microcode.
|
|
||||||
|
|
||||||
The microcode is provided with "RESTRICTED RIGHTS." Use,
|
|
||||||
duplication, or disclosure by the U.S. Government is subject
|
|
||||||
to the restrictions as set forth in FAR 52.227-14 and
|
|
||||||
DFAR252.227-7013, et seq., or its successor. Use of the
|
|
||||||
microcode by the U.S. Government constitutes
|
|
||||||
acknowledgement of AMD's proprietary rights in them.
|
|
||||||
============================================================
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
0x08, 0x20, 0x01, 0x05, 0x84, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00,
|
|
||||||
0x90, 0x85, 0xCC, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
||||||
0x20, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x70, 0x09, 0x00, 0x00,
|
|
||||||
0x49, 0x01, 0x00, 0x00, 0x8B, 0x01, 0x00, 0x00, 0xC1, 0x08, 0x00, 0x00,
|
|
||||||
0xFF, 0xFF, 0xFF, 0xFF, 0x56, 0x0F, 0x00, 0x00, 0x9E, 0x0B, 0x00, 0x00,
|
|
||||||
0x70, 0x0C, 0x00, 0x00, 0x2A, 0xFF, 0xFF, 0x29, 0xC3, 0x5F, 0xD0, 0xC1,
|
|
||||||
0xBD, 0xFF, 0xFF, 0xB3, 0x0F, 0xFF, 0x7E, 0xFD, 0xF6, 0x1F, 0xF8, 0x57,
|
|
||||||
0x3C, 0xBC, 0x63, 0x2D, 0x80, 0x96, 0xD6, 0x00, 0xAA, 0xFF, 0xEF, 0xAF,
|
|
||||||
0xE0, 0xD1, 0x9F, 0x15, 0x57, 0xEF, 0xFF, 0xFF, 0xEA, 0x87, 0x7F, 0xBF,
|
|
||||||
0x03, 0xFA, 0x0F, 0xFC, 0xFC, 0x1F, 0xBE, 0xF5, 0x00, 0xE0, 0x4A, 0x4B,
|
|
||||||
0x7F, 0xC8, 0xFF, 0xF7, 0xB4, 0xF8, 0xF0, 0x2F, 0xFF, 0x1F, 0xC5, 0xFE,
|
|
||||||
0xC0, 0xCF, 0xC3, 0x3F, 0xFF, 0x03, 0xD4, 0xFF, 0x40, 0xC8, 0x0F, 0xEF,
|
|
||||||
0x35, 0x00, 0xD0, 0x00, 0xFB, 0xAF, 0xE5, 0xBF, 0xD7, 0xFA, 0x3F, 0xF8,
|
|
||||||
0xEB, 0x3F, 0x97, 0xFF, 0x9F, 0xEB, 0xFF, 0xE0, 0x97, 0xFF, 0x5E, 0xFE,
|
|
||||||
0x7F, 0xAE, 0xFA, 0x83, 0xC9, 0x1A, 0x00, 0x08, 0x8C, 0xFF, 0xAF, 0xF2,
|
|
||||||
0xFC, 0x53, 0xDD, 0x3F, 0xFB, 0xFF, 0x3F, 0xCB, 0xF0, 0x8F, 0x55, 0xFD,
|
|
||||||
0x5F, 0x53, 0x39, 0x00, 0x81, 0x3F, 0xB6, 0xD7, 0x10, 0x40, 0x0D, 0x00,
|
|
||||||
0x78, 0xF7, 0xFF, 0x07, 0x1F, 0x8E, 0xA9, 0xE8, 0xE5, 0xFF, 0xFA, 0x4F,
|
|
||||||
0x7F, 0xF8, 0x97, 0xFA, 0x80, 0xFF, 0xC0, 0x3F, 0xBF, 0xE1, 0x1F, 0xC0,
|
|
||||||
0x00, 0xFE, 0xBF, 0x07, 0x01, 0xFC, 0x67, 0xEB, 0x00, 0x07, 0xFE, 0xDE,
|
|
||||||
0xFF, 0x02, 0x00, 0xE0, 0xFD, 0x3F, 0xBC, 0x63, 0xFF, 0x8B, 0xFF, 0xFF,
|
|
||||||
0xF5, 0x7F, 0xF0, 0xEF, 0x03, 0x00, 0x3D, 0x57, 0xFF, 0x58, 0xFE, 0xBF,
|
|
||||||
0xAC, 0x7C, 0x83, 0x3F, 0xFF, 0x7F, 0xF9, 0xE2, 0x01, 0x7E, 0x1E, 0xFE,
|
|
||||||
0x1B, 0x0F, 0xE0, 0xBF, 0xF7, 0xF6, 0x3A, 0xF0, 0xAF, 0x01, 0x80, 0xB4,
|
|
||||||
0x81, 0x7F, 0x00, 0xFF, 0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC,
|
|
||||||
0xFF, 0x00, 0xFE, 0x0D, 0x1F, 0xF8, 0x07, 0xF0, 0xFC, 0x03, 0xF8, 0x37,
|
|
||||||
0xFF, 0xF7, 0x00, 0xC0, 0xFF, 0xC0, 0x3F, 0x80, 0xE1, 0x1F, 0xC0, 0xBF,
|
|
||||||
0xFE, 0x03, 0xFF, 0x00, 0x86, 0x7F, 0x00, 0xFF, 0xF8, 0x0F, 0xFC, 0x03,
|
|
||||||
0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0xFF, 0x7B, 0x00, 0xC9, 0x7F, 0xE0, 0x1F,
|
|
||||||
0x75, 0xF0, 0xEF, 0xF0, 0x2D, 0xBF, 0xFE, 0xFF, 0xCF, 0xC3, 0x3F, 0xC0,
|
|
||||||
0x00, 0x8C, 0x6F, 0xE5, 0x3E, 0x07, 0xFD, 0x00, 0x00, 0xD0, 0xFF, 0x3D,
|
|
||||||
0x7F, 0x05, 0xF8, 0xFF, 0x5A, 0x3C, 0xF8, 0xE7, 0x7F, 0x02, 0x70, 0x01,
|
|
||||||
0x01, 0xD7, 0xE1, 0x8F, 0xFE, 0x80, 0xFF, 0x03, 0x2B, 0x80, 0x07, 0x7F,
|
|
||||||
0x09, 0x00, 0x48, 0x7D, 0x95, 0x03, 0x30, 0xE5, 0x03, 0x7A, 0x1D, 0xF8,
|
|
||||||
0xF7, 0xFF, 0xCB, 0xFF, 0xEF, 0xD5, 0x7F, 0xF0, 0x5E, 0x39, 0x00, 0x53,
|
|
||||||
0x3F, 0x80, 0xCF, 0x41, 0x40, 0x0D, 0x00, 0x30, 0xFF, 0xCA, 0x01, 0xC0,
|
|
||||||
0xFC, 0x01, 0xBD, 0x0E, 0xFF, 0xF7, 0x1F, 0xE0, 0xF8, 0x07, 0xF0, 0x7F,
|
|
||||||
0xFF, 0xFF, 0x5F, 0x95, 0xE0, 0xDF, 0xAB, 0xFF, 0xFE, 0xBF, 0x07, 0x00,
|
|
||||||
0x5C, 0x46, 0xFF, 0x01, 0x0F, 0xFE, 0xD8, 0x00, 0x60, 0x6F, 0xE0, 0x4F,
|
|
||||||
0x3A, 0xFC, 0x32, 0xD0, 0xCA, 0x7F, 0xE0, 0x9F, 0xF3, 0xF0, 0x0F, 0xF0,
|
|
||||||
0x00, 0x02, 0x50, 0x03, 0x4A, 0xFE, 0x83, 0xFF, 0x9F, 0x87, 0x7F, 0x80,
|
|
||||||
0x7F, 0x79, 0xEA, 0xFF, 0x7E, 0x1E, 0xFE, 0x01, 0x0F, 0xE0, 0xFF, 0x1B,
|
|
||||||
0x06, 0x38, 0xF0, 0xF7, 0x01, 0x00, 0x33, 0xA0, 0x7F, 0x00, 0xFF, 0x81,
|
|
||||||
0x80, 0x7F, 0xC3, 0x3F, 0xFE, 0x01, 0xFC, 0x07, 0x00, 0xFE, 0x0D, 0xFF,
|
|
||||||
0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xD7, 0x00, 0x40, 0x34,
|
|
||||||
0xC0, 0x3F, 0x80, 0xFF, 0x1F, 0xC0, 0xBF, 0xE1, 0x03, 0xFF, 0x00, 0xFE,
|
|
||||||
0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B,
|
|
||||||
0x9A, 0x6B, 0x00, 0x00, 0x7F, 0xF2, 0x1F, 0xC0, 0xF0, 0xED, 0x65, 0x7F,
|
|
||||||
0xFF, 0x81, 0x7F, 0x00, 0xC3, 0x3F, 0x80, 0x7F, 0xFC, 0x07, 0xFE, 0x01,
|
|
||||||
0x0D, 0xFF, 0x00, 0xFE, 0xF0, 0xFF, 0x3D, 0x00, 0xE0, 0x3B, 0x1A, 0x07,
|
|
||||||
0x78, 0xF0, 0x07, 0x04, 0x00, 0xF0, 0xFF, 0x7F, 0xF9, 0xE1, 0x1D, 0x0A,
|
|
||||||
0x00, 0x5E, 0xA3, 0x71, 0x80, 0x07, 0x7F, 0x40, 0x00, 0xF8, 0xFF, 0x1E,
|
|
||||||
0x8F, 0xF2, 0xFF, 0xFE, 0xDD, 0x3F, 0xFC, 0x43, 0x1F, 0xC0, 0x7F, 0xE0,
|
|
||||||
0xA5, 0xFF, 0xF0, 0x05, 0xFF, 0x04, 0xFC, 0xFF, 0x83, 0xAD, 0xC3, 0x2F,
|
|
||||||
0x0F, 0x00, 0xFC, 0x7F, 0xFF, 0xFF, 0x38, 0x80, 0x01, 0x7E, 0x1E, 0xFE,
|
|
||||||
0x2A, 0x07, 0x00, 0xBF, 0x07, 0xF0, 0x39, 0xE8, 0xD0, 0xBF, 0xBD, 0xFF,
|
|
||||||
0xDF, 0xEE, 0xFF, 0xE0, 0xBF, 0x07, 0x00, 0xFE, 0x06, 0xFE, 0x01, 0x0F,
|
|
||||||
0xFE, 0x76, 0x00, 0xDF, 0xF8, 0xFF, 0xAF, 0xF2, 0xFC, 0x03, 0xFC, 0x3C,
|
|
||||||
0x7D, 0x55, 0x0E, 0xC0, 0xD0, 0x0F, 0xE0, 0x73, 0xFF, 0xDF, 0x03, 0x00,
|
|
||||||
0x07, 0x03, 0xFD, 0x80, 0x6F, 0x7E, 0x3B, 0xFE, 0xF8, 0x0F, 0xFC, 0x03,
|
|
||||||
0x1B, 0xFE, 0x01, 0xFC, 0xE0, 0x3F, 0xF0, 0x0F, 0x6F, 0xF8, 0x07, 0xF0,
|
|
||||||
0x80, 0xFE, 0xEF, 0x01, 0x00, 0xF8, 0x5F, 0x39, 0xCF, 0x41, 0x3F, 0x80,
|
|
||||||
0x7F, 0x14, 0xFB, 0xFF, 0x3F, 0x0F, 0xFF, 0x00, 0x07, 0xF0, 0x1F, 0xF8,
|
|
||||||
0xF8, 0x37, 0xFC, 0x03, 0x00, 0x40, 0xFF, 0xF7, 0x7F, 0x90, 0x7F, 0xFF,
|
|
||||||
0x68, 0xF1, 0xE1, 0x1F, 0xFF, 0x5F, 0xFE, 0x5F, 0x80, 0x9F, 0x87, 0x7F,
|
|
||||||
0xC6, 0x01, 0xF8, 0xAA, 0x01, 0x01, 0x0E, 0xFC, 0x6A, 0x00, 0x00, 0x8C,
|
|
||||||
0xE0, 0x1F, 0xC0, 0x7F, 0x0F, 0xE0, 0xDF, 0xF0, 0x81, 0x7F, 0x00, 0xFF,
|
|
||||||
0x3F, 0x80, 0x7F, 0xC3, 0x07, 0xFE, 0x01, 0xFC, 0xFF, 0x00, 0xFE, 0x0D,
|
|
||||||
0xD7, 0x35, 0x00, 0x70, 0x67, 0x2B, 0x07, 0xC0, 0xF0, 0x07, 0xF4, 0x3A,
|
|
||||||
0xFB, 0xFF, 0x7F, 0x00, 0xE1, 0x5D, 0x0B, 0xF9, 0xDC, 0x1C, 0xFC, 0x09,
|
|
||||||
0x87, 0x3F, 0x06, 0x5C, 0x90, 0xF3, 0x1A, 0x00, 0xB0, 0xFF, 0xFF, 0x0F,
|
|
||||||
0x3F, 0xBC, 0x63, 0xD1, 0xCA, 0xFF, 0xF4, 0x9F, 0x6F, 0xF0, 0x67, 0x95,
|
|
||||||
0x00, 0xFF, 0x81, 0x7F, 0x7F, 0xC3, 0x3F, 0x80, 0x00, 0xFC, 0x7F, 0x0F,
|
|
||||||
0x7F, 0xF9, 0xDF, 0xFF, 0xFE, 0x0F, 0xFE, 0xBD, 0x07, 0xE0, 0x11, 0xE8,
|
|
||||||
0xF6, 0x7A, 0xF0, 0xF7, 0x3F, 0x80, 0xFF, 0xC0, 0xC0, 0xBF, 0xE1, 0x1F,
|
|
||||||
0x07, 0x00, 0xFE, 0xBF, 0xFF, 0x81, 0xFC, 0x2F, 0x00, 0x3F, 0x0F, 0xFF,
|
|
||||||
0xF8, 0x07, 0xF0, 0x1F, 0x03, 0xF8, 0x37, 0xFC, 0xE0, 0x1F, 0xC0, 0x7F,
|
|
||||||
0x0F, 0xE0, 0xDF, 0xF0, 0x23, 0x03, 0x00, 0x8E, 0x03, 0xFF, 0x00, 0xFE,
|
|
||||||
0x7F, 0x00, 0xFF, 0x86, 0x0F, 0xFC, 0x03, 0xF8, 0xFE, 0x01, 0xFC, 0x1B,
|
|
||||||
0x3F, 0xF0, 0x0F, 0xE0, 0xF8, 0x07, 0xF0, 0x6F, 0xFF, 0xEF, 0x01, 0x80,
|
|
||||||
|
|
||||||
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
|
@ -1,55 +0,0 @@
|
||||||
|
|
||||||
/*
|
|
||||||
** NMI A20M IGNNE INTR
|
|
||||||
* X8 H H H H
|
|
||||||
* X9 H H H L projected
|
|
||||||
* X10 H H L H
|
|
||||||
* X11 H H L L
|
|
||||||
* X12 H L H H
|
|
||||||
* X13 H L H L
|
|
||||||
* X14 H L L H
|
|
||||||
* X15 H L L L
|
|
||||||
* X16 L H H H
|
|
||||||
* X17 L H H L
|
|
||||||
* X18 L H L H
|
|
||||||
* X19 L H L L
|
|
||||||
* X20 L L H H
|
|
||||||
* X21 L L H L projected
|
|
||||||
* X22 L L L H projected
|
|
||||||
* X23 L L L L projected
|
|
||||||
*
|
|
||||||
** NMI INTR IGNNE A20M
|
|
||||||
* X8 H H H H
|
|
||||||
* X9 H L H H projected
|
|
||||||
* X10 H H L H
|
|
||||||
* X11 H L L H
|
|
||||||
* X12 H H H L
|
|
||||||
* X13 H L H L
|
|
||||||
* X14 H H L L
|
|
||||||
* X15 H L L L
|
|
||||||
* X16 L H H H
|
|
||||||
* X17 L L H H
|
|
||||||
* X18 L H L H
|
|
||||||
* X19 L L L H
|
|
||||||
* X20 L H H L
|
|
||||||
* X21 L L H L projected
|
|
||||||
* X22 L H L L projected
|
|
||||||
* X23 L L L L projected
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define XEON_X8 0xf
|
|
||||||
#define XEON_X9 0xb /* projected */
|
|
||||||
#define XEON_X10 0xd
|
|
||||||
#define XEON_X11 0x9
|
|
||||||
#define XEON_X12 0xe
|
|
||||||
#define XEON_X13 0xa
|
|
||||||
#define XEON_X14 0xc
|
|
||||||
#define XEON_X15 0x8
|
|
||||||
#define XEON_X16 0x7
|
|
||||||
#define XEON_X17 0x3
|
|
||||||
#define XEON_X18 0x5
|
|
||||||
#define XEON_X19 0x1
|
|
||||||
#define XEON_X20 0x6
|
|
||||||
#define XEON_X21 0x2 /* projected */
|
|
||||||
#define XEON_X22 0x4 /* projected */
|
|
||||||
#define XEON_X23 0x0 /* projected */
|
|
|
@ -1,55 +0,0 @@
|
||||||
|
|
||||||
/*
|
|
||||||
** NMI A20M IGNNE INTR
|
|
||||||
* X8 H H H H
|
|
||||||
* X9 H H H L projected
|
|
||||||
* X10 H H L H
|
|
||||||
* X11 H H L L
|
|
||||||
* X12 H L H H
|
|
||||||
* X13 H L H L
|
|
||||||
* X14 H L L H
|
|
||||||
* X15 H L L L
|
|
||||||
* X16 L H H H
|
|
||||||
* X17 L H H L
|
|
||||||
* X18 L H L H
|
|
||||||
* X19 L H L L
|
|
||||||
* X20 L L H H
|
|
||||||
* X21 L L H L projected
|
|
||||||
* X22 L L L H projected
|
|
||||||
* X23 L L L L projected
|
|
||||||
*
|
|
||||||
** NMI INTR IGNNE A20M
|
|
||||||
* X8 H H H H
|
|
||||||
* X9 H L H H projected
|
|
||||||
* X10 H H L H
|
|
||||||
* X11 H L L H
|
|
||||||
* X12 H H H L
|
|
||||||
* X13 H L H L
|
|
||||||
* X14 H H L L
|
|
||||||
* X15 H L L L
|
|
||||||
* X16 L H H H
|
|
||||||
* X17 L L H H
|
|
||||||
* X18 L H L H
|
|
||||||
* X19 L L L H
|
|
||||||
* X20 L H H L
|
|
||||||
* X21 L L H L projected
|
|
||||||
* X22 L H L L projected
|
|
||||||
* X23 L L L L projected
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define XEON_X8 0xf
|
|
||||||
#define XEON_X9 0xb /* projected */
|
|
||||||
#define XEON_X10 0xd
|
|
||||||
#define XEON_X11 0x9
|
|
||||||
#define XEON_X12 0xe
|
|
||||||
#define XEON_X13 0xa
|
|
||||||
#define XEON_X14 0xc
|
|
||||||
#define XEON_X15 0x8
|
|
||||||
#define XEON_X16 0x7
|
|
||||||
#define XEON_X17 0x3
|
|
||||||
#define XEON_X18 0x5
|
|
||||||
#define XEON_X19 0x1
|
|
||||||
#define XEON_X20 0x6
|
|
||||||
#define XEON_X21 0x2 /* projected */
|
|
||||||
#define XEON_X22 0x4 /* projected */
|
|
||||||
#define XEON_X23 0x0 /* projected */
|
|
|
@ -1,317 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 Advanced Micro Devices, Inc.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define SMBUS_ERROR -1
|
|
||||||
#define SMBUS_WAIT_UNTIL_READY_TIMEOUT -2
|
|
||||||
#define SMBUS_WAIT_UNTIL_DONE_TIMEOUT -3
|
|
||||||
|
|
||||||
#define SMB_SDA 0x00
|
|
||||||
#define SMB_STS 0x01
|
|
||||||
#define SMB_CTRL_STS 0x02
|
|
||||||
#define SMB_CTRL1 0x03
|
|
||||||
#define SMB_ADD 0x04
|
|
||||||
#define SMB_CTRL2 0x05
|
|
||||||
#define SMB_CTRL3 0x06
|
|
||||||
|
|
||||||
#define SMB_STS_SLVSTP (0x01 << 7)
|
|
||||||
#define SMB_STS_SDAST (0x01 << 6)
|
|
||||||
#define SMB_STS_BER (0x01 << 5)
|
|
||||||
#define SMB_STS_NEGACK (0x01 << 4)
|
|
||||||
#define SMB_STS_STASTR (0x01 << 3)
|
|
||||||
#define SMB_STS_NMATCH (0x01 << 2)
|
|
||||||
#define SMB_STS_MASTER (0x01 << 1)
|
|
||||||
#define SMB_STS_XMIT (0x01 << 0)
|
|
||||||
|
|
||||||
#define SMB_CSTS_TGSCL (0x01 << 5)
|
|
||||||
#define SMB_CSTS_TSDA (0x01 << 4)
|
|
||||||
#define SMB_CSTS_GCMTCH (0x01 << 3)
|
|
||||||
#define SMB_CSTS_MATCH (0x01 << 2)
|
|
||||||
#define SMB_CSTS_BB (0x01 << 1)
|
|
||||||
#define SMB_CSTS_BUSY (0x01 << 0)
|
|
||||||
|
|
||||||
#define SMB_CTRL1_STASTRE (0x01 << 7)
|
|
||||||
#define SMB_CTRL1_NMINTE (0x01 << 6)
|
|
||||||
#define SMB_CTRL1_GCMEN (0x01 << 5)
|
|
||||||
#define SMB_CTRL1_ACK (0x01 << 4)
|
|
||||||
#define SMB_CTRL1_RSVD (0x01 << 3)
|
|
||||||
#define SMB_CTRL1_INTEN (0x01 << 2)
|
|
||||||
#define SMB_CTRL1_STOP (0x01 << 1)
|
|
||||||
#define SMB_CTRL1_START (0x01 << 0)
|
|
||||||
|
|
||||||
#define SMB_ADD_SAEN (0x01 << 7)
|
|
||||||
|
|
||||||
#define SMB_CTRL2_ENABLE 0x01
|
|
||||||
|
|
||||||
#define SMBUS_TIMEOUT (100*1000*10)
|
|
||||||
#define SMBUS_STATUS_MASK 0xfbff
|
|
||||||
|
|
||||||
static void smbus_delay(void)
|
|
||||||
{
|
|
||||||
inb(0x80);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_wait(unsigned smbus_io_base)
|
|
||||||
{
|
|
||||||
unsigned long loops = SMBUS_TIMEOUT;
|
|
||||||
unsigned char val;
|
|
||||||
|
|
||||||
do {
|
|
||||||
smbus_delay();
|
|
||||||
val = inb(smbus_io_base + SMB_STS);
|
|
||||||
if ((val & SMB_STS_SDAST) != 0)
|
|
||||||
break;
|
|
||||||
if (val & (SMB_STS_BER | SMB_STS_NEGACK)) {
|
|
||||||
printk(BIOS_DEBUG, "SMBUS WAIT ERROR %x\n", val);
|
|
||||||
return SMBUS_ERROR;
|
|
||||||
}
|
|
||||||
} while (--loops);
|
|
||||||
|
|
||||||
outb(0, smbus_io_base + SMB_STS);
|
|
||||||
return loops ? 0 : SMBUS_WAIT_UNTIL_READY_TIMEOUT;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_write(unsigned smbus_io_base, unsigned char byte)
|
|
||||||
{
|
|
||||||
|
|
||||||
outb(byte, smbus_io_base + SMB_SDA);
|
|
||||||
return smbus_wait(smbus_io_base);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* generate a smbus start condition */
|
|
||||||
static int smbus_start_condition(unsigned smbus_io_base)
|
|
||||||
{
|
|
||||||
unsigned char val;
|
|
||||||
|
|
||||||
/* issue a START condition */
|
|
||||||
val = inb(smbus_io_base + SMB_CTRL1);
|
|
||||||
outb(val | SMB_CTRL1_START, smbus_io_base + SMB_CTRL1);
|
|
||||||
|
|
||||||
/* check for bus conflict */
|
|
||||||
val = inb(smbus_io_base + SMB_STS);
|
|
||||||
if ((val & SMB_STS_BER) != 0)
|
|
||||||
return SMBUS_ERROR;
|
|
||||||
|
|
||||||
return smbus_wait(smbus_io_base);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_check_stop_condition(unsigned smbus_io_base)
|
|
||||||
{
|
|
||||||
unsigned char val;
|
|
||||||
unsigned long loops;
|
|
||||||
loops = SMBUS_TIMEOUT;
|
|
||||||
/* check for SDA status */
|
|
||||||
do {
|
|
||||||
smbus_delay();
|
|
||||||
val = inb(smbus_io_base + SMB_CTRL1);
|
|
||||||
if ((val & SMB_CTRL1_STOP) == 0) {
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
} while (--loops);
|
|
||||||
return loops ? 0 : SMBUS_WAIT_UNTIL_READY_TIMEOUT;
|
|
||||||
|
|
||||||
/* Make sure everything is cleared and ready to go */
|
|
||||||
|
|
||||||
val = inb(smbus_io_base + SMB_CTRL1);
|
|
||||||
outb(val & ~(SMB_CTRL1_STASTRE | SMB_CTRL1_NMINTE),
|
|
||||||
smbus_io_base + SMB_CTRL1);
|
|
||||||
|
|
||||||
outb(SMB_STS_BER | SMB_STS_NEGACK | SMB_STS_STASTR,
|
|
||||||
smbus_io_base + SMB_STS);
|
|
||||||
|
|
||||||
val = inb(smbus_io_base + SMB_CTRL_STS);
|
|
||||||
outb(val | SMB_CSTS_BB, smbus_io_base + SMB_CTRL_STS);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_stop_condition(unsigned smbus_io_base)
|
|
||||||
{
|
|
||||||
unsigned char val;
|
|
||||||
val = inb(smbus_io_base + SMB_CTRL1);
|
|
||||||
outb(SMB_CTRL1_STOP, smbus_io_base + SMB_CTRL1);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_ack(unsigned smbus_io_base, int state)
|
|
||||||
{
|
|
||||||
unsigned char val = inb(smbus_io_base + SMB_CTRL1);
|
|
||||||
|
|
||||||
if (state)
|
|
||||||
outb(val | SMB_CTRL1_ACK, smbus_io_base + SMB_CTRL1);
|
|
||||||
else
|
|
||||||
outb(val & ~SMB_CTRL1_ACK, smbus_io_base + SMB_CTRL1);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_send_slave_address(unsigned smbus_io_base,
|
|
||||||
unsigned char device)
|
|
||||||
{
|
|
||||||
unsigned char val;
|
|
||||||
|
|
||||||
/* send the slave address */
|
|
||||||
outb(device, smbus_io_base + SMB_SDA);
|
|
||||||
|
|
||||||
/* check for bus conflict and NACK */
|
|
||||||
val = inb(smbus_io_base + SMB_STS);
|
|
||||||
if (((val & SMB_STS_BER) != 0) || ((val & SMB_STS_NEGACK) != 0)) {
|
|
||||||
printk(BIOS_DEBUG, "SEND SLAVE ERROR (%x)\n", val);
|
|
||||||
return SMBUS_ERROR;
|
|
||||||
}
|
|
||||||
return smbus_wait(smbus_io_base);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int smbus_send_command(unsigned smbus_io_base, unsigned char command)
|
|
||||||
{
|
|
||||||
unsigned char val;
|
|
||||||
|
|
||||||
/* send the command */
|
|
||||||
outb(command, smbus_io_base + SMB_SDA);
|
|
||||||
|
|
||||||
/* check for bus conflict and NACK */
|
|
||||||
val = inb(smbus_io_base + SMB_STS);
|
|
||||||
if (((val & SMB_STS_BER) != 0) || ((val & SMB_STS_NEGACK) != 0))
|
|
||||||
return SMBUS_ERROR;
|
|
||||||
|
|
||||||
return smbus_wait(smbus_io_base);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void _doread(unsigned smbus_io_base, unsigned char device,
|
|
||||||
unsigned char address, unsigned char *data, int count)
|
|
||||||
{
|
|
||||||
int ret;
|
|
||||||
int index = 0;
|
|
||||||
unsigned char val;
|
|
||||||
|
|
||||||
if ((ret = smbus_check_stop_condition(smbus_io_base)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
index++;
|
|
||||||
|
|
||||||
if ((ret = smbus_start_condition(smbus_io_base)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
index++; /* 2 */
|
|
||||||
if ((ret = smbus_send_slave_address(smbus_io_base, device)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
index++;
|
|
||||||
if ((ret = smbus_send_command(smbus_io_base, address)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
index++;
|
|
||||||
if ((ret = smbus_start_condition(smbus_io_base)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
/* Clear the ack for multiple byte reads */
|
|
||||||
smbus_ack(smbus_io_base, (count == 1) ? 1 : 0);
|
|
||||||
|
|
||||||
index++;
|
|
||||||
if ((ret = smbus_send_slave_address(smbus_io_base, device | 0x01)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
while (count) {
|
|
||||||
/* Set the ACK if this is the next to last byte */
|
|
||||||
smbus_ack(smbus_io_base, (count == 2) ? 1 : 0);
|
|
||||||
|
|
||||||
/* Set the stop bit if this is the last byte to read */
|
|
||||||
|
|
||||||
if (count == 1)
|
|
||||||
smbus_stop_condition(smbus_io_base);
|
|
||||||
|
|
||||||
val = inb(smbus_io_base + SMB_SDA);
|
|
||||||
*data++ = val;
|
|
||||||
|
|
||||||
if (count > 1) {
|
|
||||||
ret = smbus_wait(smbus_io_base);
|
|
||||||
if (ret)
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
count--;
|
|
||||||
}
|
|
||||||
|
|
||||||
return;
|
|
||||||
|
|
||||||
err:
|
|
||||||
printk(BIOS_DEBUG, "SMBUS READ ERROR (%d): %d\n", index, ret);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline unsigned char do_smbus_read_byte(unsigned smbus_io_base,
|
|
||||||
unsigned char device, unsigned char address)
|
|
||||||
{
|
|
||||||
unsigned char val = 0;
|
|
||||||
_doread(smbus_io_base, device, address, &val, sizeof(val));
|
|
||||||
return val;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline unsigned short do_smbus_read_word(unsigned smbus_io_base,
|
|
||||||
unsigned char device, unsigned char address)
|
|
||||||
{
|
|
||||||
unsigned short val = 0;
|
|
||||||
_doread(smbus_io_base, device, address, (unsigned char *)&val,
|
|
||||||
sizeof(val));
|
|
||||||
return val;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int _dowrite(unsigned smbus_io_base, unsigned char device,
|
|
||||||
unsigned char address, unsigned char *data, int count)
|
|
||||||
{
|
|
||||||
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if ((ret = smbus_check_stop_condition(smbus_io_base)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
if ((ret = smbus_start_condition(smbus_io_base)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
if ((ret = smbus_send_slave_address(smbus_io_base, device)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
if ((ret = smbus_send_command(smbus_io_base, address)))
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
while (count) {
|
|
||||||
if ((ret = smbus_write(smbus_io_base, *data++)))
|
|
||||||
goto err;
|
|
||||||
count--;
|
|
||||||
}
|
|
||||||
|
|
||||||
smbus_stop_condition(smbus_io_base);
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
err:
|
|
||||||
printk(BIOS_DEBUG, "SMBUS WRITE ERROR: %d\n", ret);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int do_smbus_write_byte(unsigned smbus_io_base,
|
|
||||||
unsigned char device, unsigned char address, unsigned char data)
|
|
||||||
{
|
|
||||||
return _dowrite(smbus_io_base, device, address,
|
|
||||||
(unsigned char *)&data, 1);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int do_smbus_write_word(unsigned smbus_io_base,
|
|
||||||
unsigned char device, unsigned char address, unsigned short data)
|
|
||||||
{
|
|
||||||
return _dowrite(smbus_io_base, device, address, (unsigned char *)&data,
|
|
||||||
2);
|
|
||||||
}
|
|
Loading…
Reference in New Issue