mb/google/dedede: drop obsolete ISST workaround
Early JSL silicon hang while booting Linux with ISST enabled. The malfunctioning silicon revisions have been used only for development purposes and have been phased out. Thus, drop the ISST workaround. Change-Id: Ic335c0bf03a5b07130f79c24107a1b1b0ae75611 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46459 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -29,19 +29,6 @@ static void mainboard_update_soc_chip_config(void)
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}
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}
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__weak void variant_isst_override(void)
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{
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/*
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* Implement the override only if the board uses very early/initial revisions of
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* Silicon. Otherwise nothing to override.
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*/
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}
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static void mainboard_config_isst(void *unused)
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{
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variant_isst_override();
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}
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static void mainboard_init(void *chip_info)
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{
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const struct pad_config *base_pads;
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@ -79,6 +66,3 @@ struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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.enable_dev = mainboard_enable,
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};
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/* Configure ISST before CPU initialization */
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BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, mainboard_config_isst, NULL);
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@ -36,7 +36,4 @@ int variant_memory_sku(void);
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*/
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bool variant_mem_is_half_populated(void);
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/* Variant Intel Speed Shift Technology override */
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void variant_isst_override(void);
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#endif /*__BASEBOARD_VARIANTS_H__ */
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@ -3,4 +3,3 @@
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romstage-y += memory.c
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ramstage-y += gpio.c
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ramstage-y += variant.c
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@ -1,16 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <chip.h>
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#include <device/device.h>
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#include <ec/google/chromeec/ec.h>
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void variant_isst_override(void)
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{
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config_t *cfg = config_of_soc();
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uint32_t board_ver;
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/* Override/Disable ISST in boards where board version is not populated. */
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if (google_chromeec_get_board_version(&board_ver))
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cfg->speed_shift_enable = 0;
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}
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@ -1,5 +1,3 @@
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## SPDX-License-Identifier: GPL-2.0-or-later
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romstage-y += memory.c
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ramstage-y += variant.c
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@ -1,16 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <chip.h>
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#include <device/device.h>
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#include <ec/google/chromeec/ec.h>
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void variant_isst_override(void)
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{
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config_t *cfg = config_of_soc();
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uint32_t board_ver;
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/* Override/Disable ISST in boards where board version is not populated. */
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if (google_chromeec_get_board_version(&board_ver))
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cfg->speed_shift_enable = 0;
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}
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