grunt/barla: add Realtek ALC5682 codec support

ALC5682 i2c address: 0x1A

BUG=b:171755306
BRANCH=master
TEST=emerge-grunt coreboot

Change-Id: I8bc571104bebe02acf86507774580effc808beb6
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kevin Chiu 2021-03-22 19:34:30 +08:00 committed by Patrick Georgi
parent 0514324724
commit fb796034da
6 changed files with 90 additions and 0 deletions

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@ -99,6 +99,11 @@ static void pirq_setup(void)
picr_data_ptr = mainboard_picr_data;
}
void __weak variant_devtree_update(void)
{
/* Override dev tree settings per board */
}
static void mainboard_init(void *chip_info)
{
int boardid = board_id();
@ -129,6 +134,8 @@ static void mainboard_init(void *chip_info)
GPP_CLK0_REQ_MAP_MASK,
GPP_CLK0_REQ_MAP_CLK_REQ0 <<
GPP_CLK0_REQ_MAP_SHIFT);
variant_devtree_update();
}
/*************************************************

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@ -18,5 +18,6 @@ const struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size);
const struct soc_amd_gpio *variant_gpio_table(size_t *size);
void variant_romstage_entry(void);
void variant_mainboard_suspend_resume(void);
void variant_devtree_update(void);
#endif /* __BASEBOARD_VARIANTS_H__ */

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@ -4,3 +4,4 @@ subdirs-y += ./spd
bootblock-y += variant.c
romstage-y += variant.c
ramstage-y += mainboard.c

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@ -107,6 +107,21 @@ chip soc/amd/stoneyridge
register "mclk_name" = ""oscout1""
device i2c 1a on end
end
chip drivers/i2c/generic
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "uid" = "1"
register "desc" = ""Realtek RT5682""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_14)"
register "property_count" = "2"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
register "property_list[1].name" = ""realtek,mclk-name""
register "property_list[1].string" = ""oscout1""
device i2c 1a on end
end
chip drivers/generic/max98357a
register "hid" = ""MX98357A""
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_119)"

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@ -8,4 +8,8 @@ enum careena_sku {
SKU_CAREENA_KB_BACKLIGHT19 = 19,
SKU_CAREENA_KB_BACKLIGHT22 = 22,
SKU_CAREENA_KB_BACKLIGHT23 = 23,
SKU_BARLA_ALC5682_44 = 44,
SKU_BARLA_ALC5682_45 = 45,
SKU_BARLA_ALC5682_46 = 46,
SKU_BARLA_ALC5682_47 = 47,
};

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@ -0,0 +1,62 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <ec/google/chromeec/ec.h>
#include <baseboard/variants.h>
#include <variant/sku.h>
#include <string.h>
#include <drivers/i2c/hid/chip.h>
extern struct chip_operations drivers_i2c_generic_ops;
extern struct chip_operations drivers_i2c_da7219_ops;
void variant_devtree_update(void)
{
uint32_t sku = google_chromeec_get_sku_id();
struct device *mmio_dev = NULL, *child = NULL;
struct device *alc_dev = NULL, *da7219_dev = NULL;
while (1) {
mmio_dev = dev_find_path(mmio_dev, DEVICE_PATH_MMIO);
if (mmio_dev == NULL)
break;
if (mmio_dev->path.mmio.addr == 0xfedc2000)
break;
}
if (mmio_dev == NULL)
return;
while ((child = dev_bus_each_child(mmio_dev->link_list, child)) != NULL) {
if (child->path.type != DEVICE_PATH_I2C)
continue;
if (child->path.i2c.device != 0x1a)
continue;
if (child->chip_ops == &drivers_i2c_generic_ops) {
struct drivers_i2c_generic_config *config = child->chip_info;
if (!strcmp(config->hid, "10EC5682"))
alc_dev = child;
} else if (child->chip_ops == &drivers_i2c_da7219_ops) {
da7219_dev = child;
}
}
switch (sku) {
default:
/* da7219 only */
if (da7219_dev)
da7219_dev->enabled = 1;
if (alc_dev)
alc_dev->enabled = 0;
break;
case SKU_BARLA_ALC5682_44:
case SKU_BARLA_ALC5682_45:
case SKU_BARLA_ALC5682_46:
case SKU_BARLA_ALC5682_47:
/* alc5682 only */
if (da7219_dev)
da7219_dev->enabled = 0;
if (alc_dev)
alc_dev->enabled = 1;
break;
}
}