soc/amd/stoneyridge: Add generic PM1 register clear function

Convert vboot_platform_prepare_reboot() to call a function in
soc//stoneyridge.  A subsequent patch will add another call to
the new function, and this change removes any inference of a
dependency on vboot.

BUG=b:122725586

Change-Id: I634fcd030e206c790bda697a3dbef4e8cc21b3a8
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31159
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/soc/amd/stoneyridge/include/soc/southbridge.h

@@ -604,4 +604,10 @@ void i2c_soc_early_init(void);
 /* Initialize all the i2c buses that are not marked with early init. */
 void i2c_soc_init(void);
 
+/*
+ * If a system reset is about to be requested, modify the PM1 register so it
+ * will never be misinterpreted as an S3 resume.
+ */
+void set_pm1cnt_s5(void);
+
 #endif /* __STONEYRIDGE_H__ */

src/soc/amd/stoneyridge/pmutil.c

@@ -34,9 +34,9 @@ int vboot_platform_is_resuming(void)
 	return acpi_sleep_from_pm1(pm_cnt) == ACPI_S3;
 }
 
-/* If vboot requests a system reset, modify the PM1 register so it will never be
- * misinterpreted as an S3 resume. */
-void vboot_platform_prepare_reboot(void)
+/* If a system reset is about to be requested, modify the PM1 register so it
+ * will never be misinterpreted as an S3 resume. */
+void set_pm1cnt_s5(void)
 {
 	uint16_t pm1;
 
@@ -45,3 +45,8 @@ void vboot_platform_prepare_reboot(void)
 	pm1 |= SLP_TYP_S5 << SLP_TYP_SHIFT;
 	acpi_write16(MMIO_ACPI_PM1_CNT_BLK, pm1);
 }
+
+void vboot_platform_prepare_reboot(void)
+{
+	set_pm1cnt_s5();
+}