soc/intel/apollolake: Prepare to use common HECI driver

Change-Id: Ib284493d886b223e8c85607de5fdb56b698fe5fa
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/18546
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Andrey Petrov 2017-03-02 08:50:57 -08:00 committed by Martin Roth
parent 010905ed2f
commit fba7489574
4 changed files with 6 additions and 4 deletions

View file

@ -28,7 +28,7 @@
static uint32_t dump_status(int index, int reg_addr)
{
uint32_t reg = pci_read_config32(CSE_DEV, reg_addr);
uint32_t reg = pci_read_config32(HECI1_DEV, reg_addr);
printk(BIOS_DEBUG, "CSE FWSTS%d: 0x%08x\n", index, reg);

View file

@ -22,7 +22,7 @@
uint32_t heci_fw_sts(void)
{
return pci_read_config32(CSE_DEV, REG_SEC_FW_STS0);
return pci_read_config32(HECI1_DEV, REG_SEC_FW_STS0);
}
bool heci_cse_normal(void)

View file

@ -52,8 +52,8 @@
#define HDA_DEV _PCI_DEV(0xe, 0)
#define HDA_DEVFN _PCI_DEVFN(0xe, 0)
#define CSE_DEV _PCI_DEV(0xf, 0)
#define CSE_DEVFN _PCI_DEVFN(0xf, 0)
#define HECI1_DEV _PCI_DEV(0xf, 0)
#define HECI1_DEVFN _PCI_DEVFN(0xf, 0)
#define ISH_DEV _PCI_DEV(0x11, 0)
#define ISH_DEVFN _PCI_DEVFN(0x11, 0)

View file

@ -26,6 +26,8 @@
#define PCI_DEVICE_ID_APOLLOLAKE_HWSEQ_SPI 0x5a96 /* 00:0d.2 */
#define PCI_DEVICE_ID_APOLLOLAKE_SRAM 0x5aec /* 00:0d.3 */
#define PCI_DEVICE_ID_APOLLOLAKE_AUDIO 0x5a98 /* 00:0e.0 */
#define PCI_DEVICE_ID_APOLLOLAKE_CSE0 0x5a9a /* 00:0f.0 */
#define PCI_DEVICE_ID_HECI1 PCI_DEVICE_ID_APOLLOLAKE_CSE0
#define PCI_DEVICE_ID_APOLLOLAKE_SATA 0x5ae0 /* 00:12.0 */
#define PCI_DEVICE_ID_APOLLOLAKE_XHCI 0x5aa8 /* 00:15.0 */
#define PCI_DEVICE_ID_APOLLOLAKE_XDCI 0x5aaa /* 00:15.1 */