Use Intel Core code for eagleheights CAR init, not Intel Core 2, as
any of the CPUs might be used. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -109,7 +109,8 @@ ldscript /arch/i386/lib/id.lds
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##
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##
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## Setup Cache-As-Ram
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## Setup Cache-As-Ram
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##
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##
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mainboardinit cpu/intel/model_6fx/cache_as_ram.inc
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## Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
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mainboardinit cpu/intel/model_6ex/cache_as_ram.inc
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###
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###
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### This is the early phase of coreboot startup
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### This is the early phase of coreboot startup
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@ -14,6 +14,7 @@ crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/arch/i386/lib/id.inc
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crt0-y += ../../../../src/arch/i386/lib/id.inc
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# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
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crt0-y += ../../../../src/cpu/intel/model_6ex/cache_as_ram.inc
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crt0-y += ../../../../src/cpu/intel/model_6ex/cache_as_ram.inc
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crt0-y += auto.inc
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crt0-y += auto.inc
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@ -238,4 +238,5 @@ void real_main(unsigned long bist)
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sdram_initialize(ARRAY_SIZE(mch), mch);
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sdram_initialize(ARRAY_SIZE(mch), mch);
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}
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}
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#include "cpu/intel/model_6fx/cache_as_ram_disable.c"
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/* Use Intel Core (not Core 2) code for CAR init, any CPU might be used. */
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#include "cpu/intel/model_6ex/cache_as_ram_disable.c"
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