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skylake: iomap: Remove unused RCBA region 

Remove the now unused RCBA base and size from iomap.h
and fix a trivial typo that doesn't seem to get used
anywhere.

BUG=chrome-os-partner:44622
BRANCH=none
TEST=emege-glados coreboot

Change-Id: If95dd2ee3f4a8dd0a6a7cf996aef8f19f27ddc48
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ee7b1a8a75a9e9dc191c16ddc32b6a38acec398c
Original-Change-Id: I0c49803d47105c3c55121caedaffaa249c4f0189
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295906
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11533
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2015-08-27 16:39:31 -07:00 committed by Patrick Georgi
parent fe85ae3f41
commit fbd5367b1c
1 changed files with 1 additions and 5 deletions
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6
src/soc/intel/skylake/include/soc/iomap.h
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@ -28,7 +28,7 @@
#define MCFG_BASE_SIZE 0x4000000
#define PCH_PCR_BASE_ADDRESS 0xfd000000
#define PCH_BCR_BASE_SIZE 0x1000000
#define PCH_PCR_BASE_SIZE 0x1000000
#define UART_DEBUG_BASE_ADDRESS 0xfe034000
#define UART_DEBUG_BASE_SIZE 0x1000
@ -48,10 +48,6 @@
#define GDXC_BASE_ADDRESS 0xfed84000
#define GDXC_BASE_SIZE 0x1000
/* TODO: need to remove RCBA code after ASL clean up */
#define RCBA_BASE_ADDRESS 0xfed1c000
#define RCBA_BASE_SIZE 0x4000
#define HPET_BASE_ADDRESS 0xfed00000
#define PCH_PWRM_BASE_ADDRESS 0xfe000000