commonlib: Add timestamp codes for AGESA
BUG=b:70432544 TEST=Build & boot kahlee. Look at timestamps. Change-Id: I3bf691a0fb1f5c09e7b6c9965c9e506393ec31f6 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -77,6 +77,22 @@ enum timestamp_id {
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TS_END_COPYVPD_RO = 551,
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TS_END_COPYVPD_RW = 552,
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/* 900-920 reserved for vendorcode extensions (900-940: AMD AGESA) */
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TS_AGESA_INIT_RESET_START = 900,
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TS_AGESA_INIT_RESET_DONE = 901,
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TS_AGESA_INIT_EARLY_START = 902,
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TS_AGESA_INIT_EARLY_DONE = 903,
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TS_AGESA_INIT_POST_START = 904,
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TS_AGESA_INIT_POST_DONE = 905,
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TS_AGESA_INIT_ENV_START = 906,
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TS_AGESA_INIT_ENV_DONE = 907,
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TS_AGESA_INIT_MID_START = 908,
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TS_AGESA_INIT_MID_DONE = 909,
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TS_AGESA_INIT_LATE_START = 910,
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TS_AGESA_INIT_LATE_DONE = 911,
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TS_AGESA_INIT_RTB_START = 912,
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TS_AGESA_INIT_RTB_DONE = 913,
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/* 940-950 reserved for vendorcode extensions (940-950: Intel ME) */
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TS_ME_INFORM_DRAM_WAIT = 940,
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TS_ME_INFORM_DRAM_DONE = 941,
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@ -181,6 +197,22 @@ static const struct timestamp_id_to_name {
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{ TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" },
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{ TS_START_KERNEL, "jumping to kernel" },
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/* AMD AGESA related timestamps */
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{ TS_AGESA_INIT_RESET_START, "calling AmdInitReset" },
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{ TS_AGESA_INIT_RESET_DONE, "back from AmdInitReset" },
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{ TS_AGESA_INIT_EARLY_START, "calling AmdInitEarly" },
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{ TS_AGESA_INIT_EARLY_DONE, "back from AmdInitEarly" },
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{ TS_AGESA_INIT_POST_START, "calling AmdInitPost" },
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{ TS_AGESA_INIT_POST_DONE, "back from AmdInitPost" },
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{ TS_AGESA_INIT_ENV_START, "calling AmdInitEnv" },
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{ TS_AGESA_INIT_ENV_DONE, "back from AmdInitEnv" },
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{ TS_AGESA_INIT_MID_START, "calling AmdInitMid" },
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{ TS_AGESA_INIT_MID_DONE, "back from AmdInitMid" },
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{ TS_AGESA_INIT_LATE_START, "calling AmdInitLate" },
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{ TS_AGESA_INIT_LATE_DONE, "back from AmdInitLate" },
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{ TS_AGESA_INIT_RTB_START, "calling AmdInitRtb/AmdS3Save" },
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{ TS_AGESA_INIT_RTB_DONE, "back from AmdInitRtb/AmdS3Save" },
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/* Intel ME related timestamps */
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{ TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgement of raminit"},
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{ TS_ME_INFORM_DRAM_DONE, "finished waiting for ME response"},
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