rtc: force mc146818 register D to a correct value

On Panther Point PCH (and maybe cougar point), when some of the register
D reserved bits are set, the RTC starts misbehaving (e.g. incrementing
the year byte every second).
There are probably undocumented features implemented behind those bits.
Let's reset register D to a known state to ensure we get the expected
RTC behavior.

Change-Id: I7e2c2a2c6130a974bccb3d760b41eaa579a58b67
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: http://review.coreboot.org/1695
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Vincent Palatin 2012-08-07 16:05:14 -07:00 committed by Stefan Reinauer
parent 6f4297677c
commit fc1b9ee4aa
1 changed files with 2 additions and 0 deletions

View File

@ -171,6 +171,8 @@ void rtc_init(int invalid)
cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL);
/* Setup the frequency it operates at */
cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
/* Ensure all reserved bits are 0 in register D */
cmos_write(RTC_VRT, RTC_VALID);
#if CONFIG_USE_OPTION_TABLE
/* See if there is a LB CMOS checksum error */