diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index e749d75df1..c9986cae00 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -51,6 +51,8 @@ void soc_fill_smm_reg_info(struct smm_register_info *reg); /* v2 only */
 #define PSPSTS_INVALID_NAME	8
 #define PSPSTS_INVALID_BLOB	9
 
+/* PSP gen1-only. SoCs with PSP gen2 already have the DRAM initialized when
+   the x86 cores are released from reset. */
 int psp_notify_dram(void);
 
 int psp_notify_smm(void);
diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c
index b95545923f..66f7d59224 100644
--- a/src/soc/amd/common/block/psp/psp.c
+++ b/src/soc/amd/common/block/psp/psp.c
@@ -55,29 +55,6 @@ void psp_print_cmd_status(int cmd_status, struct mbox_buffer_header *header)
 		printk(BIOS_DEBUG, "OK\n");
 }
 
-/*
- * Notify the PSP that DRAM is present.  Upon receiving this command, the PSP
- * will load its OS into fenced DRAM that is not accessible to the x86 cores.
- */
-int psp_notify_dram(void)
-{
-	int cmd_status;
-	struct mbox_default_buffer buffer = {
-		.header = {
-			.size = sizeof(buffer)
-		}
-	};
-
-	printk(BIOS_DEBUG, "PSP: Notify that DRAM is available... ");
-
-	cmd_status = send_psp_command(MBOX_BIOS_CMD_DRAM_INFO, &buffer);
-
-	/* buffer's status shouldn't change but report it if it does */
-	psp_print_cmd_status(cmd_status, &buffer.header);
-
-	return cmd_status;
-}
-
 /*
  * Notify the PSP that the system is completing the boot process.  Upon
  * receiving this command, the PSP will only honor commands where the buffer
diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h
index 4d3aca59b3..5baa0642dc 100644
--- a/src/soc/amd/common/block/psp/psp_def.h
+++ b/src/soc/amd/common/block/psp/psp_def.h
@@ -8,7 +8,6 @@
 #include <amdblocks/psp.h>
 
 /* x86 to PSP commands */
-#define MBOX_BIOS_CMD_DRAM_INFO			0x01
 #define MBOX_BIOS_CMD_SMM_INFO			0x02
 #define MBOX_BIOS_CMD_SX_INFO			0x03
 #define   MBOX_BIOS_CMD_SX_INFO_SLEEP_TYPE_MAX	0x07
@@ -19,7 +18,8 @@
 #define MBOX_BIOS_CMD_S3_DATA_INFO		0x08
 #define MBOX_BIOS_CMD_NOP			0x09
 #define MBOX_BIOS_CMD_ABORT			0xfe
-/* x86 to PSP commands, v1 */
+/* x86 to PSP commands, v1-only */
+#define MBOX_BIOS_CMD_DRAM_INFO			0x01
 #define MBOX_BIOS_CMD_SMU_FW			0x19
 #define MBOX_BIOS_CMD_SMU_FW2			0x1a
 
diff --git a/src/soc/amd/common/block/psp/psp_gen1.c b/src/soc/amd/common/block/psp/psp_gen1.c
index 55070f258d..37257ba92e 100644
--- a/src/soc/amd/common/block/psp/psp_gen1.c
+++ b/src/soc/amd/common/block/psp/psp_gen1.c
@@ -170,3 +170,26 @@ int psp_load_named_blob(enum psp_blob_type type, const char *name)
 	cbfs_unmap(blob);
 	return cmd_status;
 }
+
+/*
+ * Notify the PSP that DRAM is present.  Upon receiving this command, the PSP
+ * will load its OS into fenced DRAM that is not accessible to the x86 cores.
+ */
+int psp_notify_dram(void)
+{
+	int cmd_status;
+	struct mbox_default_buffer buffer = {
+		.header = {
+			.size = sizeof(buffer)
+		}
+	};
+
+	printk(BIOS_DEBUG, "PSP: Notify that DRAM is available... ");
+
+	cmd_status = send_psp_command(MBOX_BIOS_CMD_DRAM_INFO, &buffer);
+
+	/* buffer's status shouldn't change but report it if it does */
+	psp_print_cmd_status(cmd_status, &buffer.header);
+
+	return cmd_status;
+}