Add Board Checklist Support
Build the <board>_checklist.html file which contains a checklist table
for each stage of coreboot. This processing builds a set of implemented
(done) routines which are marked green in the table. The remaining
required routines (work-to-do) are marked red in the table and the
optional routines are marked yellow in the table. The table heading
for each stage contains a completion percentage in terms of count of
routines (done .vs. required).
Add some Kconfig values:
* CREATE_BOARD_CHECKLIST - When selected creates the checklist file
* MAKE_CHECKLIST_PUBLIC - Copies the checklist file into the
Documenation directory
* CHECKLIST_DATA_FILE_LOCATION - Location of the checklist data files:
* <stage>_complete.dat - Lists all of the weak routines
* <stage>_optional.dat - Lists weak routines which may be optionally
implemented
TEST=Build with Galileo Gen2.
Change-Id: Ie056f8bb6d45ff7f3bc6390b5630b5063f54c527
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15011
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy
Martin Roth
parent
eb0e7bc976
commit
fc3741f379
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@ -85,6 +85,7 @@ subdirs-y += src/mainboard/$(MAINBOARDDIR)
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subdirs-y += payloads payloads/external
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subdirs-y += payloads payloads/external
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subdirs-y += site-local
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subdirs-y += site-local
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subdirs-y += util/checklist
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#######################################################################
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#######################################################################
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# Add source classes and their build options
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# Add source classes and their build options
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30
src/Kconfig
30
src/Kconfig
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@ -1174,3 +1174,33 @@ config DEBUG_BOOT_STATE
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help
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help
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Control debugging of the boot state machine. When selected displays
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Control debugging of the boot state machine. When selected displays
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the state boundaries in ramstage.
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the state boundaries in ramstage.
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config CREATE_BOARD_CHECKLIST
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bool
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default n
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help
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When selected, creates a webpage showing the implementation status for
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the board. Routines highlighted in green are complete, yellow are
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optional and red are required and must be implemented. A table is
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produced for each stage of the boot process except the bootblock. The
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red items may be used as an implementation checklist for the board.
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config MAKE_CHECKLIST_PUBLIC
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bool
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default n
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help
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When selected, build/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
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is copied into the Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board
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directory.
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config CHECKLIST_DATA_FILE_LOCATION
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string
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help
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Location of the <stage>_complete.dat and <stage>_optional.dat files
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that are consumed during checklist processing. <stage>_complete.dat
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contains the symbols that are expected to be in the resulting image.
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<stage>_optional.dat is a subset of <stage>_complete.dat and contains
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a list of weak symbols which the resulting image may consume. Other
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symbols contained only in <stage>_complete.dat will be flagged as
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required and not implemented if a weak implementation is found in the
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resulting image.
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@ -115,4 +115,8 @@ config VBT_FILE
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depends on GOP_SUPPORT
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depends on GOP_SUPPORT
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default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/vbt.bin"
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default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/vbt.bin"
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config CHECKLIST_DATA_FILE_LOCATION
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string
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default "src/vendorcode/intel/fsp/fsp1_1/checklist"
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endif #PLATFORM_USES_FSP1_1
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endif #PLATFORM_USES_FSP1_1
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@ -0,0 +1,77 @@
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arch_segment_loaded
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backup_top_of_ram
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bootblock_mainboard_early_init
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bootblock_mainboard_init
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bootblock_soc_early_init
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bootblock_soc_init
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boot_device_init
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car_mainboard_post_console_init
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car_mainboard_pre_console_init
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car_soc_post_console_init
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car_soc_pre_console_init
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fill_power_state
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fw_cfg_acpi_tables
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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init_timer
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lb_board
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lb_framebuffer
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mainboard_add_dimm_info
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mainboard_check_ec_image
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mainboard_io_trap_handler
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mainboard_memory_init_params
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mainboard_post
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mainboard_romstage_entry
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mainboard_save_dimm_info
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mainboard_silicon_init_params
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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mainboard_suspend_resume
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map_oprom_vendev
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mirror_payload
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mrc_cache_get_current
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mrc_cache_stash_data
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northbridge_smi_handler
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nvm_mmio_to_flash_offset
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platform_prog_run
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platform_segment_loaded
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raminit
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ramstage_cache_invalid
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report_memory_config
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save_chromeos_gpios
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setup_stack_and_mtrrs
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smbios_mainboard_bios_version
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smbios_mainboard_manufacturer
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smbios_mainboard_product_name
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smbios_mainboard_serial_number
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smbios_mainboard_set_uuid
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smbios_mainboard_version
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smm_disable_busmaster
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soc_after_ram_init
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soc_after_silicon_init
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soc_display_memory_init_params
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soc_display_silicon_init_params
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soc_fill_acpi_wake
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soc_memory_init_params
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soc_pre_ram_init
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soc_silicon_init_params
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soc_skip_ucode_update
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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timestamp_tick_freq_mhz
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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vboot_platform_prepare_reboot
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verstage_mainboard_init
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wifi_regulatory_domain
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write_smp_table
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@ -0,0 +1,53 @@
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acpi_create_serialio_ssdt
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fw_cfg_acpi_tables
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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init_timer
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lb_board
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lb_framebuffer
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mainboard_add_dimm_info
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mainboard_io_trap_handler
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mainboard_post
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mainboard_silicon_init_params
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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mainboard_suspend_resume
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map_oprom_vendev
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mirror_payload
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northbridge_smi_handler
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nvm_mmio_to_flash_offset
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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smbios_mainboard_bios_version
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smbios_mainboard_manufacturer
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smbios_mainboard_product_name
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smbios_mainboard_serial_number
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smbios_mainboard_set_uuid
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smbios_mainboard_version
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smm_disable_busmaster
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soc_after_silicon_init
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soc_display_silicon_init_params
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soc_fill_acpi_wake
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soc_silicon_init_params
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soc_skip_ucode_update
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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timestamp_tick_freq_mhz
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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wifi_regulatory_domain
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write_smp_table
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@ -0,0 +1,46 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fw_cfg_acpi_tables
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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lb_board
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lb_framebuffer
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mainboard_add_dimm_info
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mainboard_io_trap_handler
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mainboard_post
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mainboard_silicon_init_params
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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mainboard_suspend_resume
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map_oprom_vendev
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mirror_payload
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northbridge_smi_handler
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nvm_mmio_to_flash_offset
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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smbios_mainboard_bios_version
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smbios_mainboard_manufacturer
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smbios_mainboard_product_name
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smbios_mainboard_serial_number
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smbios_mainboard_set_uuid
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smbios_mainboard_version
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smm_disable_busmaster
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soc_after_silicon_init
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soc_display_silicon_init_params
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soc_silicon_init_params
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soc_skip_ucode_update
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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wifi_regulatory_domain
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write_smp_table
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@ -0,0 +1,54 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fill_power_state
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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init_timer
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mainboard_add_dimm_info
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mainboard_check_ec_image
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mainboard_fill_spd_data
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mainboard_io_trap_handler
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mainboard_memory_init_params
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mainboard_post
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mainboard_romstage_entry
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mainboard_save_dimm_info
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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map_oprom_vendev
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migrate_power_state
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mrc_cache_get_current_with_version
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mrc_cache_stash_data_with_version
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platform_prog_run
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platform_segment_loaded
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print_fsp_info
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raminit
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ramstage_cache_invalid
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report_memory_config
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romstage_common
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save_chromeos_gpios
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set_max_freq
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setup_stack_and_mtrrs
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smm_region
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smm_region_size
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soc_after_ram_init
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soc_display_memory_init_params
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soc_display_mtrrs
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soc_get_variable_mtrr_count
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soc_memory_init_params
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soc_pre_ram_init
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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vboot_platform_prepare_reboot
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@ -0,0 +1,34 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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mainboard_add_dimm_info
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mainboard_check_ec_image
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mainboard_io_trap_handler
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mainboard_post
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mainboard_romstage_entry
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mainboard_save_dimm_info
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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map_oprom_vendev
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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soc_after_ram_init
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soc_display_memory_init_params
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soc_display_mtrrs
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soc_get_variable_mtrr_count
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soc_memory_init_params
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soc_pre_ram_init
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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@ -0,0 +1,35 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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car_mainboard_post_console_init
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car_mainboard_pre_console_init
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car_soc_post_console_init
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car_soc_pre_console_init
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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get_sw_write_protect_state
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gpio_acpi_path
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init_timer
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mainboard_check_ec_image
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mainboard_io_trap_handler
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mainboard_post
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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map_oprom_vendev
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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soc_display_mtrrs
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soc_get_variable_mtrr_count
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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vboot_platform_prepare_reboot
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verstage_mainboard_init
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@ -0,0 +1,22 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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car_mainboard_post_console_init
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car_mainboard_pre_console_init
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car_soc_post_console_init
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car_soc_pre_console_init
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mainboard_check_ec_image
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mainboard_post
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platform_prog_run
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platform_segment_loaded
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||||||
|
soc_display_mtrrs
|
||||||
|
soc_get_variable_mtrr_count
|
||||||
|
stage_cache_add
|
||||||
|
stage_cache_load_stage
|
||||||
|
timestamp_get
|
||||||
|
tsc_freq_mhz
|
||||||
|
vb2ex_hwcrypto_digest_extend
|
||||||
|
vb2ex_hwcrypto_digest_finalize
|
||||||
|
vb2ex_hwcrypto_digest_init
|
||||||
|
vboot_platform_prepare_reboot
|
||||||
|
verstage_mainboard_init
|
||||||
|
|
@ -0,0 +1,260 @@
|
||||||
|
#
|
||||||
|
# This file is part of the coreboot project.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2016 Intel Corporation.
|
||||||
|
#
|
||||||
|
# This program is free software; you can redistribute it and/or modify
|
||||||
|
# it under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation; version 2 of the License.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
|
||||||
|
###########################################################################
|
||||||
|
# Build the board implementation checklist
|
||||||
|
###########################################################################
|
||||||
|
|
||||||
|
# Only build the checklist for boards under development
|
||||||
|
ifeq ($(CONFIG_CREATE_BOARD_CHECKLIST),y)
|
||||||
|
|
||||||
|
#
|
||||||
|
# Extract the symbol table from the image
|
||||||
|
#
|
||||||
|
%.symbol_table: %.elf %.debug
|
||||||
|
$(NM_$(class)) $< > $@
|
||||||
|
$(NM_$(class)) $(*D)/$(*F).debug >> $@
|
||||||
|
|
||||||
|
#
|
||||||
|
# All symbols in the image
|
||||||
|
#
|
||||||
|
# 1. Remove the address and symbol type
|
||||||
|
# 2. Sort the table into alphabetical order
|
||||||
|
# 3. Remove any duplicates
|
||||||
|
#
|
||||||
|
%.symbols: %.symbol_table
|
||||||
|
sed 's/^...........//' $< > $@.tmp
|
||||||
|
sort $@.tmp > $@.tmp2
|
||||||
|
uniq $@.tmp2 > $@
|
||||||
|
rm $@.tmp $@.tmp2
|
||||||
|
|
||||||
|
#
|
||||||
|
# Weak symbols in the image
|
||||||
|
#
|
||||||
|
# 1. Find the weak symbols
|
||||||
|
# 2. Remove the address and symbol type
|
||||||
|
# 3. Sort the table into alphabetical order
|
||||||
|
# 4. Remove any duplicates
|
||||||
|
#
|
||||||
|
%.weak: %.symbol_table
|
||||||
|
grep -F " W " $< | sed 's/^...........//' > $@.tmp
|
||||||
|
sort $@.tmp > $@.tmp2
|
||||||
|
uniq $@.tmp2 > $@
|
||||||
|
rm $@.tmp $@.tmp2
|
||||||
|
|
||||||
|
#
|
||||||
|
# Expected symbols in the image
|
||||||
|
#
|
||||||
|
# 1. Get the complete list of expected symbols in the image
|
||||||
|
# 2. Sort the table into alphabetical order
|
||||||
|
# 3. Remove any duplicates
|
||||||
|
#
|
||||||
|
%.expected: %.symbol_table
|
||||||
|
cp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_complete.dat $@.tmp
|
||||||
|
# If no separate verstage, combine verstage and romstage routines into a single list
|
||||||
|
if [ "$(*F)" = "romstage" ]; then \
|
||||||
|
if [ ! -e $(*D)/verstage.elf ]; then \
|
||||||
|
if [ ! -e $(*D)/postcar.elf ]; then \
|
||||||
|
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_complete.dat >> $@.tmp; \
|
||||||
|
fi; \
|
||||||
|
fi; \
|
||||||
|
fi
|
||||||
|
sort $@.tmp > $@.tmp2
|
||||||
|
uniq $@.tmp2 > $@
|
||||||
|
rm $@.tmp $@.tmp2
|
||||||
|
|
||||||
|
#
|
||||||
|
# Optional symbols in the image
|
||||||
|
#
|
||||||
|
# 1. Get the list of optional symbols in the image
|
||||||
|
# 2. Sort the table into alphabetical order
|
||||||
|
# 3. Remove any duplicates
|
||||||
|
#
|
||||||
|
%.optional: %.symbol_table
|
||||||
|
cp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat $@.tmp
|
||||||
|
# If no separate verstage, combine verstage and romstage routines into a single list
|
||||||
|
if [ "$(*F)" = "romstage" ]; then \
|
||||||
|
if [ ! -e $(*D)/verstage.elf ]; then \
|
||||||
|
if [ ! -e $(*D)/postcar.elf ]; then \
|
||||||
|
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_optional.dat >> $@.tmp; \
|
||||||
|
fi; \
|
||||||
|
fi; \
|
||||||
|
fi
|
||||||
|
sort $@.tmp > $@.tmp2
|
||||||
|
uniq $@.tmp2 > $@
|
||||||
|
rm $@.tmp $@.tmp2
|
||||||
|
|
||||||
|
#
|
||||||
|
# Expected Symbols Optional Weak Done Type
|
||||||
|
# no yes no d/c yes Don't display
|
||||||
|
# yes no no no no Required - not implemented
|
||||||
|
# yes no yes no no Optional - not implemented
|
||||||
|
# yes yes yes yes no Optional - not implemented
|
||||||
|
# yes yes no no yes Required - implemented
|
||||||
|
# yes yes yes no yes Required - implemented
|
||||||
|
#
|
||||||
|
# Implemented routines are in the symbol table and are not weak
|
||||||
|
#
|
||||||
|
# 1. Remove expected symbols which are not in the image (not implemented yet)
|
||||||
|
# 2. Remove weak symbols from the list (not implemented yet)
|
||||||
|
#
|
||||||
|
%.done: %.symbols %.expected %.weak %.optional
|
||||||
|
comm -12 $(*D)/$(*F).expected $(*D)/$(*F).symbols | sed "s/^[ \t]*//" > $@.tmp
|
||||||
|
comm -23 $@.tmp $(*D)/$(*F).weak | sed "s/^[ \t]*//" > $@
|
||||||
|
rm $@.tmp
|
||||||
|
|
||||||
|
#
|
||||||
|
# Remove any routines that are implemented
|
||||||
|
#
|
||||||
|
%.optional2: %.optional %.done
|
||||||
|
comm -23 $^ | sed "s/^[ \t]*//" > $@
|
||||||
|
|
||||||
|
#
|
||||||
|
# Remove any implemented or optional routines
|
||||||
|
#
|
||||||
|
%.tbd: %.expected %.done %.optional2
|
||||||
|
comm -23 $(*D)/$(*F).expected $(*D)/$(*F).done | sed "s/^[ \t]*//" > $@.tmp
|
||||||
|
comm -23 $@.tmp $(*D)/$(*F).optional2 | sed "s/^[ \t]*//" > $@
|
||||||
|
rm $@.tmp
|
||||||
|
|
||||||
|
#
|
||||||
|
# Build the implementation table for each stage
|
||||||
|
# 1. Color code the rows
|
||||||
|
# * Done table rows are in green
|
||||||
|
# * Optional table rows are in yellow
|
||||||
|
# * TBD table rows are in red
|
||||||
|
# 2. Add the row termination
|
||||||
|
# 3. Sort the rows into alphabetical order
|
||||||
|
#
|
||||||
|
%.table_rows: %.optional2 %.done %.expected %.tbd
|
||||||
|
sed -e 's/^/<tr bgcolor=#c0ffc0><td>Required<\/td><td>/' $(*D)/$(basename $(*F)).done > $@.tmp
|
||||||
|
sed -e 's/^/<tr bgcolor=#ffffc0><td>Optional<\/td><td>/' $(*D)/$(basename $(*F)).optional2 >> $@.tmp
|
||||||
|
if [ -s $(*D)/$(basename $(*F)).tbd ]; then \
|
||||||
|
sed -e 's/^/<tr bgcolor=#ffc0c0><td>Required<\/td><td>/' $(*D)/$(basename $(*F)).tbd >> $@.tmp; \
|
||||||
|
fi
|
||||||
|
sed -e 's/$$/<\/td><\/tr>/' -i $@.tmp
|
||||||
|
sort -t ">" -k4 $@.tmp > $@
|
||||||
|
rm $@.tmp
|
||||||
|
|
||||||
|
#
|
||||||
|
# Count the lines in the done file
|
||||||
|
#
|
||||||
|
done_lines = $$(wc -l $(*D)/$(basename $(*F)).done | sed 's/ .*//')
|
||||||
|
|
||||||
|
#
|
||||||
|
# Count the lines in the optional file
|
||||||
|
#
|
||||||
|
optional_lines = $$(wc -l $(*D)/$(basename $(*F)).optional2 | sed 's/ .*//')
|
||||||
|
|
||||||
|
#
|
||||||
|
# Count the lines in the expected file
|
||||||
|
#
|
||||||
|
expected_lines = $$(wc -l $(*D)/$(basename $(*F)).expected | sed 's/ .*//')
|
||||||
|
|
||||||
|
# Compute the percentage done by routine count
|
||||||
|
percent_complete = $$(($(done_lines) * 100 / ($(expected_lines) - $(optional_lines))))
|
||||||
|
|
||||||
|
#
|
||||||
|
# Build the table
|
||||||
|
# 1. Add the table header
|
||||||
|
# 2. Add the table rows
|
||||||
|
# 3. Add the table trailer
|
||||||
|
#
|
||||||
|
%.html: %.table_rows
|
||||||
|
echo "<table border=1>" > $@
|
||||||
|
echo "<tr><th colspan=2>$(basename $(*F)): $(percent_complete)% Done</th></tr>" >> $@
|
||||||
|
echo "<tr><th>Type</th><th>Routine</td></tr>" >> $@
|
||||||
|
cat $< >> $@
|
||||||
|
echo "</table>" >> $@
|
||||||
|
|
||||||
|
#
|
||||||
|
# Determine which HTML files to include into the webpage
|
||||||
|
#
|
||||||
|
ifeq ($(CONFIG_SEPARATE_VERSTAGE),y)
|
||||||
|
html_table_files += $(objcbfs)/verstage.html
|
||||||
|
endif
|
||||||
|
ifeq ($(CONFIG_POSTCAR_STAGE),y)
|
||||||
|
html_table_files += $(objcbfs)/postcar.html
|
||||||
|
endif
|
||||||
|
html_table_files += $(objcbfs)/romstage.html $(objcbfs)/ramstage.html
|
||||||
|
|
||||||
|
#
|
||||||
|
# Create a list with each file on a separate line
|
||||||
|
#
|
||||||
|
list_of_html_files = $(subst _NEWLINE_,${\n},${html_table_files})
|
||||||
|
|
||||||
|
#
|
||||||
|
# Get the date for the webpage
|
||||||
|
#
|
||||||
|
current_date_time = $$(date +"%Y/%m/%d %T %Z")
|
||||||
|
|
||||||
|
#
|
||||||
|
# Build the webpage from the implementation tables
|
||||||
|
# 1. Add the header to the webpage
|
||||||
|
# 2. Add the legend to the webpage
|
||||||
|
# 3. Use a table to place stage tables side-by-side
|
||||||
|
# 4. Add the stage tables to the webpage
|
||||||
|
# 5. Separate the stage tables
|
||||||
|
# 6. Terminate the outer table
|
||||||
|
# 7. Add the trailer to the webpage
|
||||||
|
#
|
||||||
|
$(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html: $(html_table_files)
|
||||||
|
echo "<html>" > $@
|
||||||
|
echo "<head>" >> $@
|
||||||
|
echo "<title>$(CONFIG_MAINBOARD_PART_NUMBER) Implementation Status</title>" >> $@
|
||||||
|
echo "</title>" >> $@
|
||||||
|
echo "<body>" >> $@
|
||||||
|
echo "<h1>$(CONFIG_MAINBOARD_PART_NUMBER) Implementation Status<br>$(current_date_time)</h1>" >> $@
|
||||||
|
echo "<table>" >> $@
|
||||||
|
echo " <tr><td colspan=2><b>Legend</b></td></tr>" >> $@
|
||||||
|
echo " <tr><td bgcolor=\"#ffc0c0\">Red</td><td>Required - To-be-implemented</td></tr>" >> $@
|
||||||
|
echo " <tr><td bgcolor=\"#ffffc0\">Yellow</td><td>Optional</td></tr>" >> $@
|
||||||
|
echo " <tr><td bgcolor=\"#c0ffc0\">Green</td><td>Implemented</td></tr>" >> $@
|
||||||
|
echo "</table>" >> $@
|
||||||
|
echo "<table>" >> $@
|
||||||
|
echo " <tr valign=\"top\">" >> $@
|
||||||
|
for table in $(list_of_html_files); do \
|
||||||
|
echo " <td>" >> $@; \
|
||||||
|
cat $$table >> $@; \
|
||||||
|
echo " </td>" >> $@; \
|
||||||
|
echo " <td width=5> </td>" >> $@; \
|
||||||
|
done
|
||||||
|
echo " </tr>" >> $@
|
||||||
|
echo "</table>" >> $@
|
||||||
|
echo "</body>" >> $@
|
||||||
|
echo "</html>" >> $@
|
||||||
|
|
||||||
|
#
|
||||||
|
# Copy the output file into the Documentation directory
|
||||||
|
#
|
||||||
|
Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html: $(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
|
||||||
|
if [ ! -d Documentation/$(CONFIG_MAINBOARD_VENDOR) ]; then \
|
||||||
|
mkdir Documentation/$(CONFIG_MAINBOARD_VENDOR); \
|
||||||
|
fi
|
||||||
|
if [ ! -d Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board ]; then \
|
||||||
|
mkdir Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board; \
|
||||||
|
fi
|
||||||
|
cp $< $@
|
||||||
|
|
||||||
|
#
|
||||||
|
# Determine where to place the output file
|
||||||
|
#
|
||||||
|
ifeq ($(CONFIG_MAKE_CHECKLIST_PUBLIC),y)
|
||||||
|
INTERMEDIATE+=Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
|
||||||
|
else
|
||||||
|
INTERMEDIATE+=$(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
|
||||||
|
endif
|
||||||
|
|
||||||
|
endif
|
||||||
Loading…
Reference in New Issue