drivers/i2c/w83793: Drop dead code
Nothing selects this driver. Drop it before it grows moss. Change-Id: I4d0e678a8725c1fdf9263b9fae4e4fb6bb5ab4de Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43268 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
000784bc84
commit
fc5469c345
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config DRIVERS_I2C_W83793
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bool
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ramstage-$(CONFIG_DRIVERS_I2C_W83793) += w83793.c
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@ -1,93 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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struct drivers_i2c_w83793_config {
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u8 mfc;
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u8 fanin;
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u8 fanin_sel;
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u8 peci_agent_conf;
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u8 tcase0; /* °C */
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u8 tcase1; /* °C */
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u8 tcase2; /* °C */
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u8 tcase3; /* °C */
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u8 tr_enable;
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u8 td_mode_select;
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u8 critical_temperature; /* °C */
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u32 vcorea_high_limit_mv; /* mV */
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u32 vcorea_low_limit_mv; /* mV */
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u32 vcoreb_high_limit_mv; /* mV */
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u32 vcoreb_low_limit_mv; /* mV */
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u32 vtt_high_limit_mv; /* mV */
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u32 vtt_low_limit_mv; /* mV */
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u32 vsen1_high_limit_mv; /* mV */
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u32 vsen1_low_limit_mv; /* mV */
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u32 vsen2_high_limit_mv; /* mV */
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u32 vsen2_low_limit_mv; /* mV */
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u32 vsen3_high_limit_mv; /* mV */
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u32 vsen3_low_limit_mv; /* mV */
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u32 vsen4_high_limit_mv; /* mV */
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u32 vsen4_low_limit_mv; /* mV */
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u32 vdd_high_limit_mv; /* mV */
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u32 vdd_low_limit_mv; /* mV */
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u32 vsb_high_limit_mv; /* mV */
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u32 vsb_low_limit_mv; /* mV */
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u32 vbat_high_limit_mv; /* mV */
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u32 vbat_low_limit_mv; /* mV */
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u8 td1_critical_temperature; /* °C */
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u8 td1_critical_hysteresis; /* °C */
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u8 td1_warning_temperature; /* °C */
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u8 td1_warning_hysteresis; /* °C */
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u8 td2_critical_temperature; /* °C */
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u8 td2_critical_hysteresis; /* °C */
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u8 td2_warning_temperature; /* °C */
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u8 td2_warning_hysteresis; /* °C */
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u8 td3_critical_temperature; /* °C */
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u8 td3_critical_hysteresis; /* °C */
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u8 td3_warning_temperature; /* °C */
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u8 td3_warning_hysteresis; /* °C */
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u8 td4_critical_temperature; /* °C */
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u8 td4_critical_hysteresis; /* °C */
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u8 td4_warning_temperature; /* °C */
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u8 td4_warning_hysteresis; /* °C */
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u8 tr1_critical_temperature; /* °C */
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u8 tr1_critical_hysteresis; /* °C */
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u8 tr1_warning_temperature; /* °C */
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u8 tr1_warning_hysteresis; /* °C */
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u8 tr2_critical_temperature; /* °C */
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u8 tr2_critical_hysteresis; /* °C */
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u8 tr2_warning_temperature; /* °C */
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u8 tr2_warning_hysteresis; /* °C */
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u8 fanctrl1;
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u8 fanctrl2;
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u8 first_valid_fan_number;
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u8 td1_fan_select;
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u8 td2_fan_select;
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u8 td3_fan_select;
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u8 td4_fan_select;
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u8 tr1_fan_select;
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u8 tr2_fan_select;
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u8 fan1_nonstop; /* % of full speed (0-100) */
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u8 fan2_nonstop; /* % of full speed (0-100) */
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u8 fan3_nonstop; /* % of full speed (0-100) */
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u8 fan4_nonstop; /* % of full speed (0-100) */
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u8 fan5_nonstop; /* % of full speed (0-100) */
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u8 fan6_nonstop; /* % of full speed (0-100) */
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u8 fan7_nonstop; /* % of full speed (0-100) */
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u8 fan8_nonstop; /* % of full speed (0-100) */
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u8 default_speed; /* % of full speed (0-100) */
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u8 fan1_duty; /* % of full speed (0-100) */
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u8 fan2_duty; /* % of full speed (0-100) */
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u8 fan3_duty; /* % of full speed (0-100) */
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u8 fan4_duty; /* % of full speed (0-100) */
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u8 fan5_duty; /* % of full speed (0-100) */
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u8 fan6_duty; /* % of full speed (0-100) */
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u8 fan7_duty; /* % of full speed (0-100) */
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u8 fan8_duty; /* % of full speed (0-100) */
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};
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@ -1,307 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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#include <console/console.h>
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#include <device/device.h>
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#include "w83793.h"
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#include <device/smbus.h>
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#include "chip.h"
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static int w83793_fan_limit(struct device *dev, int fan, uint16_t limit)
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{
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return smbus_write_byte(dev, 0x90 + fan * 2, limit >> 8) ||
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smbus_write_byte(dev, 0x91 + fan * 2, limit & 0xff);
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}
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static int w83793_bank(struct device *dev, int bank)
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{
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return smbus_write_byte(dev, 0, bank);
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}
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static int w83793_td_level(struct device *dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x30 + fan, level[0]);
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smbus_write_byte(dev, 0x31 + fan, level[1]);
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smbus_write_byte(dev, 0x32 + fan, level[2]);
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smbus_write_byte(dev, 0x33 + fan, level[3]);
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smbus_write_byte(dev, 0x34 + fan, level[4]);
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smbus_write_byte(dev, 0x35 + fan, level[5]);
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smbus_write_byte(dev, 0x36 + fan, level[6]);
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return 0;
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}
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static int w83793_tr_level(struct device *dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x70 + fan, level[0]);
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smbus_write_byte(dev, 0x71 + fan, level[1]);
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smbus_write_byte(dev, 0x72 + fan, level[2]);
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smbus_write_byte(dev, 0x73 + fan, level[3]);
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smbus_write_byte(dev, 0x74 + fan, level[4]);
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smbus_write_byte(dev, 0x75 + fan, level[5]);
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smbus_write_byte(dev, 0x76 + fan, level[6]);
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return 0;
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}
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static int w83793_td_fan_level(struct device *dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x38 + fan, level[0]);
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smbus_write_byte(dev, 0x39 + fan, level[1]);
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smbus_write_byte(dev, 0x3a + fan, level[2]);
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smbus_write_byte(dev, 0x3b + fan, level[3]);
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smbus_write_byte(dev, 0x3c + fan, level[4]);
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smbus_write_byte(dev, 0x3d + fan, level[5]);
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smbus_write_byte(dev, 0x3e + fan, level[6]);
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return 0;
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}
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static int w83793_tr_fan_level(struct device *dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x78 + fan, level[0]);
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smbus_write_byte(dev, 0x79 + fan, level[1]);
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smbus_write_byte(dev, 0x7a + fan, level[2]);
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smbus_write_byte(dev, 0x7b + fan, level[3]);
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smbus_write_byte(dev, 0x7c + fan, level[4]);
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smbus_write_byte(dev, 0x7d + fan, level[5]);
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smbus_write_byte(dev, 0x7e + fan, level[6]);
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return 0;
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}
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static uint8_t millivolts_to_limit_value_type1(int millivolts)
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{
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/* Datasheet v1.4 page 64 (VCoreA, VCoreB, Vtt Limit) */
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return ((millivolts * 125) / 1000);
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}
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static uint8_t millivolts_to_limit_value_type2(int millivolts)
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{
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/* Datasheet v1.4 page 64 (VSEN1, VEN2, VSEN3) */
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return ((millivolts * 625) / 10000);
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}
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static uint8_t millivolts_to_limit_value_type3(int millivolts)
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{
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/* Datasheet v1.4 page 64 (5VDD, 5VSB) */
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return ((((millivolts * 10) + 1500) * 417) / 10000);
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}
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static uint8_t fan_pct_to_cfg_val(uint8_t percent)
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{
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uint8_t cfg = (((unsigned int)percent * 10000) / 15873);
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if (cfg > 0x3f)
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cfg = 0x3f;
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return cfg;
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}
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static void w83793_init(struct device *dev)
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{
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struct drivers_i2c_w83793_config *config = dev->chip_info;
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uint16_t id;
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int i;
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if (w83793_bank(dev, 0))
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printk(BIOS_ERR, "%s: failed\n", __func__);
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if (!config)
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return;
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id = smbus_read_byte(dev, 0x0d);
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w83793_bank(dev, 0x80);
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id |= smbus_read_byte(dev, 0x0d) << 8;
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printk(BIOS_ERR, "ID: %04x\n", id);
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/* reset configuration */
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smbus_write_byte(dev, 0x40, 0x80);
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smbus_write_byte(dev, 0x51, 0x06);
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/* Multi function control */
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smbus_write_byte(dev, 0x58, config->mfc);
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/* FANIN_Ctrl */
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smbus_write_byte(dev, 0x5c, config->fanin);
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/* FANIN_Sel */
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smbus_write_byte(dev, 0x5d, config->fanin_sel);
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/* Temperature source */
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smbus_write_byte(dev, 0x5e, config->td_mode_select);
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/* TR monitor enable */
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smbus_write_byte(dev, 0x5f, config->tr_enable);
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/* PECI Agent configuration */
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smbus_write_byte(dev, 0xd0, config->peci_agent_conf);
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/* TCase */
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smbus_write_byte(dev, 0xd1, config->tcase0);
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smbus_write_byte(dev, 0xd2, config->tcase1);
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smbus_write_byte(dev, 0xd3, config->tcase2);
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smbus_write_byte(dev, 0xd4, config->tcase3);
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/* PECI Reportstyle */
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smbus_write_byte(dev, 0xd5, 0x00);
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/* Voltage high/low limits */
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smbus_write_byte(dev, 0x60, millivolts_to_limit_value_type1(config->vcorea_high_limit_mv));
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smbus_write_byte(dev, 0x61, millivolts_to_limit_value_type1(config->vcorea_low_limit_mv));
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smbus_write_byte(dev, 0x62, millivolts_to_limit_value_type1(config->vcoreb_high_limit_mv));
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smbus_write_byte(dev, 0x63, millivolts_to_limit_value_type1(config->vcoreb_low_limit_mv));
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smbus_write_byte(dev, 0x64, millivolts_to_limit_value_type1(config->vtt_high_limit_mv));
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smbus_write_byte(dev, 0x65, millivolts_to_limit_value_type1(config->vtt_low_limit_mv));
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smbus_write_byte(dev, 0x6a, millivolts_to_limit_value_type2(config->vsen1_high_limit_mv));
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smbus_write_byte(dev, 0x6b, millivolts_to_limit_value_type2(config->vsen1_low_limit_mv));
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smbus_write_byte(dev, 0x6c, millivolts_to_limit_value_type2(config->vsen2_high_limit_mv));
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smbus_write_byte(dev, 0x6d, millivolts_to_limit_value_type2(config->vsen2_low_limit_mv));
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smbus_write_byte(dev, 0x6e, millivolts_to_limit_value_type2(config->vsen3_high_limit_mv));
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smbus_write_byte(dev, 0x6f, millivolts_to_limit_value_type2(config->vsen3_low_limit_mv));
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smbus_write_byte(dev, 0x70, millivolts_to_limit_value_type1(config->vsen4_high_limit_mv));
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smbus_write_byte(dev, 0x71, millivolts_to_limit_value_type1(config->vsen4_low_limit_mv));
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smbus_write_byte(dev, 0x72, millivolts_to_limit_value_type3(config->vdd_high_limit_mv));
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smbus_write_byte(dev, 0x73, millivolts_to_limit_value_type3(config->vdd_low_limit_mv));
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smbus_write_byte(dev, 0x74, millivolts_to_limit_value_type3(config->vsb_high_limit_mv));
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smbus_write_byte(dev, 0x75, millivolts_to_limit_value_type3(config->vsb_low_limit_mv));
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smbus_write_byte(dev, 0x76, millivolts_to_limit_value_type2(config->vbat_high_limit_mv));
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smbus_write_byte(dev, 0x77, millivolts_to_limit_value_type2(config->vbat_low_limit_mv));
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/* Temperature high/low limits */
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smbus_write_byte(dev, 0x78, config->td1_critical_temperature);
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smbus_write_byte(dev, 0x79, config->td1_critical_hysteresis);
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smbus_write_byte(dev, 0x7a, config->td1_warning_temperature);
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smbus_write_byte(dev, 0x7b, config->td1_warning_hysteresis);
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smbus_write_byte(dev, 0x7c, config->td2_critical_temperature);
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smbus_write_byte(dev, 0x7d, config->td2_critical_hysteresis);
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smbus_write_byte(dev, 0x7e, config->td2_warning_temperature);
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smbus_write_byte(dev, 0x7f, config->td2_warning_hysteresis);
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smbus_write_byte(dev, 0x80, config->td3_critical_temperature);
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smbus_write_byte(dev, 0x81, config->td3_critical_hysteresis);
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smbus_write_byte(dev, 0x82, config->td3_warning_temperature);
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smbus_write_byte(dev, 0x83, config->td3_warning_hysteresis);
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smbus_write_byte(dev, 0x84, config->td4_critical_temperature);
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smbus_write_byte(dev, 0x85, config->td4_critical_hysteresis);
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smbus_write_byte(dev, 0x86, config->td4_warning_temperature);
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smbus_write_byte(dev, 0x87, config->td4_warning_hysteresis);
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smbus_write_byte(dev, 0x88, config->tr1_critical_temperature);
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smbus_write_byte(dev, 0x89, config->tr1_critical_hysteresis);
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smbus_write_byte(dev, 0x8a, config->tr1_warning_temperature);
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smbus_write_byte(dev, 0x8b, config->tr1_warning_hysteresis);
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smbus_write_byte(dev, 0x8c, config->tr2_critical_temperature);
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smbus_write_byte(dev, 0x8d, config->tr2_critical_hysteresis);
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smbus_write_byte(dev, 0x8e, config->tr2_warning_temperature);
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smbus_write_byte(dev, 0x8f, config->tr2_warning_hysteresis);
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/* Set minimum FAN speeds before alarms will be set */
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for (i = 0; i < config->first_valid_fan_number; i++)
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w83793_fan_limit(dev, i, 0x0);
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for (i = config->first_valid_fan_number; i < 12; i++)
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w83793_fan_limit(dev, i, 0x768);
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/* Fan output style control */
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smbus_write_byte(dev, 0xb0, config->fanctrl1);
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smbus_write_byte(dev, 0xb1, config->fanctrl2);
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/* FAN Uptime */
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smbus_write_byte(dev, 0xc3, 0x02);
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/* FAN downtime */
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smbus_write_byte(dev, 0xc4, 0x03);
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/* ALL FAN critical temperature */
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smbus_write_byte(dev, 0xc5, config->critical_temperature);
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/* Temperature offset */
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smbus_write_byte(dev, 0xa8, 0xf9);
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smbus_write_byte(dev, 0xa9, 0xf9);
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smbus_write_byte(dev, 0xaa, 0xf9);
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smbus_write_byte(dev, 0xab, 0xf9);
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/* Default FAN speed */
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smbus_write_byte(dev, 0xb2, fan_pct_to_cfg_val(config->default_speed));
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/* Manual FAN speeds */
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smbus_write_byte(dev, 0xb3, fan_pct_to_cfg_val(config->fan1_duty));
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smbus_write_byte(dev, 0xb4, fan_pct_to_cfg_val(config->fan2_duty));
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smbus_write_byte(dev, 0xb5, fan_pct_to_cfg_val(config->fan3_duty));
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smbus_write_byte(dev, 0xb6, fan_pct_to_cfg_val(config->fan4_duty));
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smbus_write_byte(dev, 0xb7, fan_pct_to_cfg_val(config->fan5_duty));
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smbus_write_byte(dev, 0xb8, fan_pct_to_cfg_val(config->fan6_duty));
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smbus_write_byte(dev, 0xb9, fan_pct_to_cfg_val(config->fan7_duty));
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smbus_write_byte(dev, 0xba, fan_pct_to_cfg_val(config->fan8_duty));
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/* BANK 2 */
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smbus_write_byte(dev, 0x00, 0x02);
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/* TD FAN select */
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smbus_write_byte(dev, 0x01, config->td1_fan_select);
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smbus_write_byte(dev, 0x02, config->td2_fan_select);
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smbus_write_byte(dev, 0x03, config->td3_fan_select);
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smbus_write_byte(dev, 0x04, config->td4_fan_select);
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smbus_write_byte(dev, 0x05, config->tr1_fan_select);
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smbus_write_byte(dev, 0x06, config->tr2_fan_select);
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/* FAN control mode */
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smbus_write_byte(dev, 0x07, 0x00);
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||||
|
||||
/* hysteresis tolerance */
|
||||
smbus_write_byte(dev, 0x08, 0xaa);
|
||||
smbus_write_byte(dev, 0x09, 0xaa);
|
||||
|
||||
/* FanNonStop */
|
||||
smbus_write_byte(dev, 0x18, fan_pct_to_cfg_val(config->fan1_nonstop));
|
||||
smbus_write_byte(dev, 0x19, fan_pct_to_cfg_val(config->fan2_nonstop));
|
||||
smbus_write_byte(dev, 0x1a, fan_pct_to_cfg_val(config->fan3_nonstop));
|
||||
smbus_write_byte(dev, 0x1b, fan_pct_to_cfg_val(config->fan4_nonstop));
|
||||
smbus_write_byte(dev, 0x1c, fan_pct_to_cfg_val(config->fan5_nonstop));
|
||||
smbus_write_byte(dev, 0x1d, fan_pct_to_cfg_val(config->fan6_nonstop));
|
||||
smbus_write_byte(dev, 0x1e, fan_pct_to_cfg_val(config->fan7_nonstop));
|
||||
smbus_write_byte(dev, 0x1f, fan_pct_to_cfg_val(config->fan8_nonstop));
|
||||
|
||||
/* FanStart */
|
||||
smbus_write_byte(dev, 0x20, 0x08);
|
||||
smbus_write_byte(dev, 0x21, 0x08);
|
||||
smbus_write_byte(dev, 0x22, 0x08);
|
||||
smbus_write_byte(dev, 0x23, 0x08);
|
||||
smbus_write_byte(dev, 0x24, 0x08);
|
||||
smbus_write_byte(dev, 0x25, 0x08);
|
||||
smbus_write_byte(dev, 0x26, 0x08);
|
||||
smbus_write_byte(dev, 0x27, 0x08);
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
w83793_td_level(dev, i, (const char[]){ 0x32, 0x32, 0x32, 0x32, 0x37, 0x41, 0x4b });
|
||||
|
||||
for (i = 0; i < 2; i++)
|
||||
w83793_tr_level(dev, i, (const char[]){ 0x1e, 0x23, 0x28, 0x2d, 0x32, 0x37, 0x3c });
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
w83793_td_fan_level(dev, i, (const char[]){ 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x26 });
|
||||
|
||||
for (i = 0; i < 2; i++)
|
||||
w83793_tr_fan_level(dev, i, (const char[]){ 0x08, 0x0c, 0x10, 0x18, 0x20, 0x30, 0x38 });
|
||||
|
||||
|
||||
smbus_write_byte(dev, 0x00, 0x00);
|
||||
|
||||
/* start monitoring operation */
|
||||
smbus_write_byte(dev, 0x40, 0x09);
|
||||
|
||||
}
|
||||
|
||||
static struct device_operations w83793_operations = {
|
||||
.read_resources = noop_read_resources,
|
||||
.set_resources = noop_set_resources,
|
||||
.init = w83793_init,
|
||||
};
|
||||
|
||||
static void enable_dev(struct device *dev)
|
||||
{
|
||||
dev->ops = &w83793_operations;
|
||||
}
|
||||
|
||||
struct chip_operations drivers_i2c_w83793_ops = {
|
||||
CHIP_NAME("Nuvoton W83793 Hardware Monitor")
|
||||
.enable_dev = enable_dev,
|
||||
};
|
|
@ -1,6 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef W83793_H
|
||||
#define W83793_H
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue