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mb/google/zork/vilboz: Enable SAR proximity sensor STH9324 

BUG=b:161759253
BRANCH=firmware-zork-13434.B
TEST=emerge-zork coreboot chromeos-bootimage
firmware log:
\_SB.I2C2.SEMTECH SX9324: SAR Proximity Sensor at I2C: 02:28
kernel log:
INFO kernel: [   11.238644] sx932x i2c-STH9324:00: initial compensation success

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I6294ce291365443dd1c4550ba75cb7f33481b889
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45565
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Wu 2020-09-21 15:25:19 +08:00 committed by Patrick Georgi
parent 92f46aaac7
commit fc66ab6959
2 changed files with 14 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/mainboard/google/zork/variants/vilboz/gpio.c
View File

@ -16,6 +16,11 @@ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
PAD_GPO(GPIO_140, HIGH),
};
static const struct soc_amd_gpio vilboz_gpio_set_stage_ram[] = {
/* P sensor INT */
PAD_INT(GPIO_40, PULL_NONE, LEVEL_LOW, STATUS_DELIVERY),
};
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
{
uint32_t board_version;
@ -33,6 +38,6 @@ const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
return bid_1_gpio_set_stage_ram;
}
*size = 0;
return NULL;
*size = ARRAY_SIZE(vilboz_gpio_set_stage_ram);
return vilboz_gpio_set_stage_ram;
}

7
src/mainboard/google/zork/variants/vilboz/overridetree.cb
View File

@ -142,5 +142,12 @@ chip soc/amd/picasso
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
chip drivers/i2c/generic
register "hid" = ""STH9324""
register "name" = ""SEMTECH SX9324""
register "desc" = ""SAR Proximity Sensor""
register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_40)"
device i2c 28 on end
end
end
end # chip soc/amd/picasso