From fca152cb89b1481c660819664cc2d76a2a15e011 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sun, 20 Dec 2020 18:01:26 +0100 Subject: [PATCH] soc/intel/cnl: add Kconfig values for GMA backlight registers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the right register values for backlight control to CNL's Kconfig. To make iasl happy about the reversed register order, split the field. Change-Id: I05a06cc42397c202df9c9a1ebc72fb10da3b10ec Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/48772 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Angel Pons --- src/drivers/intel/gma/acpi/gma.asl | 3 +++ src/soc/intel/cannonlake/Kconfig | 12 ++++++++++++ 2 files changed, 15 insertions(+) diff --git a/src/drivers/intel/gma/acpi/gma.asl b/src/drivers/intel/gma/acpi/gma.asl index c4ee2db826..03b049106c 100644 --- a/src/drivers/intel/gma/acpi/gma.asl +++ b/src/drivers/intel/gma/acpi/gma.asl @@ -20,6 +20,9 @@ Device (GFX0) { Offset (CONFIG_INTEL_GMA_BCLV_OFFSET), BCLV, CONFIG_INTEL_GMA_BCLV_WIDTH, + } + Field (GFRG, DWordAcc, NoLock, Preserve) + { Offset (CONFIG_INTEL_GMA_BCLM_OFFSET), BCLM, CONFIG_INTEL_GMA_BCLM_WIDTH } diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index ea4fadb113..a86c4df877 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -366,4 +366,16 @@ config INTEL_TXT_BIOSACM_ALIGNMENT hex default 0x40000 # 256KB +config INTEL_GMA_BCLV_OFFSET + default 0xc8258 + +config INTEL_GMA_BCLV_WIDTH + default 32 + +config INTEL_GMA_BCLM_OFFSET + default 0xc8254 + +config INTEL_GMA_BCLM_WIDTH + default 32 + endif