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soc/amd/cezanne: Add counter initializers 

Some counters are not being initialized and are relying on mainboards to
set their values.  If the mainboards have not implemented these
functions it leads to indeterminate behavior.

BUG=b:224987813
TEST=builds

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I254e26080319478b1b5b1f5c353a7966cfac63b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62872
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Jon Murphy 2022-03-16 11:03:38 -06:00 committed by Felix Held
parent cd93e8e67f
commit fcccff35f0
1 changed files with 4 additions and 4 deletions
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8
src/soc/amd/cezanne/fsp_m_params.c
View File

@ -45,10 +45,10 @@ static void fill_ddi_descriptors(FSP_M_CONFIG *mcfg,
static void fsp_fill_pcie_ddi_descriptors(FSP_M_CONFIG *mcfg)
{
const fsp_dxio_descriptor *fsp_dxio;
const fsp_ddi_descriptor *fsp_ddi;
size_t num_dxio;
size_t num_ddi;
const fsp_dxio_descriptor *fsp_dxio = NULL;
const fsp_ddi_descriptor *fsp_ddi = NULL;
size_t num_dxio = 0;
size_t num_ddi = 0;
mainboard_get_dxio_ddi_descriptors(&fsp_dxio, &num_dxio,
&fsp_ddi, &num_ddi);