Remove copies of rtl8168.c
One copy was slightly different, but all the differences were commented out Change-Id: I3cc7b5621c681a1eb286f9b16ef3ebdce03abb6b Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1356 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
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@ -23,6 +23,7 @@ source src/drivers/emulation/Kconfig
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source src/drivers/generic/Kconfig
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source src/drivers/i2c/Kconfig
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source src/drivers/oxford/Kconfig
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source src/drivers/realtek/Kconfig
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source src/drivers/sil/Kconfig
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source src/drivers/trident/Kconfig
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source src/drivers/ics/Kconfig
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@ -23,6 +23,7 @@ subdirs-y += emulation
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subdirs-y += generic
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subdirs-y += i2c
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subdirs-y += oxford
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subdirs-y += realtek
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subdirs-y += sil
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subdirs-y += trident
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subdirs-y += ics
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@ -0,0 +1,6 @@
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config RTL8168_ROM_DISABLE
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bool "Disable RTL8168 ROM"
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default n
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help
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Just enough of a driver to make coreboot not look for an Option ROM.
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No configuration is necessary for the OS to pick up the device.
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@ -0,0 +1,20 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2012 secunet Security Networks AG
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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driver-$(CONFIG_RTL8168_ROM_DISABLE) += rtl8168.c
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@ -43,6 +43,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_1024
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select GFXUMA
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select CHANNEL_XOR_RANDOMIZATION
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select RTL8168_ROM_DISABLE
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config MAINBOARD_DIR
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string
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@ -17,7 +17,6 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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driver-y += rtl8168.c
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ramstage-$(CONFIG_HAVE_ACPI_SLIC) += acpi_slic.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
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@ -1,77 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <delay.h>
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// #define RTL8168_DEBUG 1
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static void nic_init(struct device *dev)
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{
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printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
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// Nothing to do yet, but this has to be here to keep
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// coreboot from trying to execute an option ROM.
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#ifdef RTL8168_DEBUG
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u8 reg8;
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printk(BIOS_DEBUG, "Resetting device... ");
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pci_write_config8(dev, 0x37, (1 << 4));
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do {
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reg8 = pci_read_config8(dev, 0x37);
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reg8 &= (1 << 4);
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} while (reg8);
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printk(BIOS_DEBUG, "ok\n");
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printk(BIOS_DEBUG, "Eeprom Auto-Load... ");
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reg8 = pci_read_config8(dev, 0x50);
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reg8 &= 0x3f;
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reg8 |= (1 << 6);
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pci_write_config8(dev, 0x50, reg8);
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mdelay(3);
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printk(BIOS_DEBUG, "ok\n");
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#endif
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}
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static struct device_operations nic_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = nic_init,
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.scan_bus = 0,
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};
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static const struct pci_driver rtl8168_nic __pci_driver = {
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.ops = &nic_ops,
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.vendor = 0x10ec,
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.device = 0x8168,
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};
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#ifdef RTL8168_DEBUG
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static const struct pci_driver rtl8129_nic __pci_driver = {
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.ops = &nic_ops,
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.vendor = 0x10ec,
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.device = 0x8129,
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};
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#endif
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@ -41,6 +41,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_512
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select GFXUMA
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select CHANNEL_XOR_RANDOMIZATION
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select RTL8168_ROM_DISABLE
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config MAINBOARD_DIR
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string
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@ -17,6 +17,4 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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driver-y += rtl8168.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
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@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select GFXUMA
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select CHANNEL_XOR_RANDOMIZATION
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select OVERRIDE_CLOCK_DISABLE
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select RTL8168_ROM_DISABLE
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config MAINBOARD_DIR
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string
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@ -17,6 +17,4 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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driver-y += rtl8168.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
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@ -1,49 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* This code should work for all ICH* southbridges with a NIC. */
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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static void nic_init(struct device *dev)
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{
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printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
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// Nothing to do yet, but this has to be here to keep
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// coreboot from trying to execute an option ROM.
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}
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static struct device_operations nic_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = nic_init,
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.scan_bus = 0,
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};
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static const struct pci_driver rtl8169_nic __pci_driver = {
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.ops = &nic_ops,
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.vendor = 0x10ec,
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.device = 0x8168,
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};
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@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_1024
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select CHANNEL_XOR_RANDOMIZATION
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select GFXUMA
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select RTL8168_ROM_DISABLE
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config MAINBOARD_DIR
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string
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@ -18,6 +18,5 @@
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##
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ramstage-y += m3885.c
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driver-y += rtl8168.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
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@ -1,49 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* This code should work for all ICH* southbridges with a NIC. */
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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static void nic_init(struct device *dev)
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{
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printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
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// Nothing to do yet, but this has to be here to keep
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// coreboot from trying to execute an option ROM.
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}
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static struct device_operations nic_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = nic_init,
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.scan_bus = 0,
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};
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static const struct pci_driver rtl8169_nic __pci_driver = {
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.ops = &nic_ops,
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.vendor = 0x10ec,
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.device = 0x8168,
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};
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