haswell: add option to mark graphics memory write-combining.

The graphics memory can be accessed in a faster manner by
setting it to write-combing mode. Add an option to enable
write-combining for the graphics memory.

Change-Id: I797fcd9f0dfb074f9e45476773acbfe614eb4b0a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2893
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/northbridge/intel/haswell/Kconfig

@@ -82,6 +82,14 @@ config DCACHE_RAM_ROMSTAGE_STACK_SIZE
 	  The amount of anticipated stack usage from the data cache
 	  during pre-ram rom stage execution.
 
+config MARK_GRAPHICS_MEM_WRCOMB
+	bool "Mark graphics memory as write-combining."
+	default n
+	help
+	 The graphics performance may increase if the graphics
+	 memory is set as write-combining cache type. This option
+	 enables marking the graphics memory as write-combining.
+
 config HAVE_MRC
 	bool "Add a System Agent binary"
 	help

src/northbridge/intel/haswell/gma.c

@@ -217,12 +217,29 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+static void gma_read_resources(struct device *dev)
+{
+	pci_dev_read_resources(dev);
+
+#if CONFIG_MARK_GRAPHICS_MEM_WRCOMB
+	struct resource *res;
+
+	/* Set the graphics memory to write combining. */
+	res = find_resource(dev, PCI_BASE_ADDRESS_2);
+	if (res == NULL) {
+		printk(BIOS_DEBUG, "gma: memory resource not found.\n");
+		return;
+	}
+	res->flags |= IORESOURCE_WRCOMB;
+#endif
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem    = gma_set_subsystem,
 };
 
 static struct device_operations gma_func0_ops = {
-	.read_resources		= pci_dev_read_resources,
+	.read_resources		= gma_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= gma_func0_init,