diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 9da154cd2b..16a8a53c75 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -73,6 +73,7 @@ void fch_early_init(void)
 	pm_set_power_failure_state();
 	fch_print_pmxc0_status();
 	i2c_soc_early_init();
+	show_spi_speeds_and_modes();
 
 	if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
 		lpc_disable_spi_rom_sharing();
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c
index 88011c1fc3..110718e2e1 100644
--- a/src/soc/amd/picasso/early_fch.c
+++ b/src/soc/amd/picasso/early_fch.c
@@ -75,6 +75,7 @@ void fch_early_init(void)
 	pm_set_power_failure_state();
 	fch_print_pmxc0_status();
 	i2c_soc_early_init();
+	show_spi_speeds_and_modes();
 
 	if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
 		lpc_disable_spi_rom_sharing();
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 5f5fc72bfc..7493770fac 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -357,6 +357,7 @@ void bootblock_fch_init(void)
 {
 	pm_set_power_failure_state();
 	fch_print_pmxc0_status();
+	show_spi_speeds_and_modes();
 }
 
 static void fch_init_acpi_ports(void)