mb/google/brya/variants/brask: Enable Bluetooth offload support
Add fw_config NAU88L25B_I2S field, I2S2 configuration and enabling CnviBtAudioOffload UPD bit. BUG=none TEST=temerge-brask coreboot Signed-off-by: Mac Chiang <mac.chiang@intel.com> Change-Id: Id5da8c5c471be176bc0fe1eda4da7faf8ed2e8d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61404 Reviewed-by: Zhuohao Lee <zhuohao@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -5,3 +5,6 @@ romstage-y += gpio.c
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ramstage-y += gpio.c
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ramstage-y += gpio.c
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ramstage-y += ramstage.c
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ramstage-y += ramstage.c
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ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
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ramstage-$(CONFIG_FW_CONFIG) += variant.c
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@ -0,0 +1,44 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootstate.h>
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#include <console/console.h>
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#include <fw_config.h>
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#include <gpio.h>
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static const struct pad_config bt_i2s_enable_pads[] = {
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PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), /* BT_I2S_BCLK */
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PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), /* BT_I2S_SYNC */
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PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), /* BT_I2S_SDO */
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PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), /* BT_I2S_SDI */
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PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* SSP2_SCLK */
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PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* SSP2_SFRM */
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PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* SSP_TXD */
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PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* SSP_RXD */
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};
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static const struct pad_config bt_i2s_disable_pads[] = {
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PAD_NC(GPP_VGPIO_30, NONE),
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PAD_NC(GPP_VGPIO_31, NONE),
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PAD_NC(GPP_VGPIO_32, NONE),
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PAD_NC(GPP_VGPIO_33, NONE),
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PAD_NC(GPP_VGPIO_34, NONE),
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PAD_NC(GPP_VGPIO_35, NONE),
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PAD_NC(GPP_VGPIO_36, NONE),
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PAD_NC(GPP_VGPIO_37, NONE),
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};
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static void fw_config_handle(void *unused)
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{
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if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
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printk(BIOS_INFO, "Disable BT offload audio related GPIO pins.\n");
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gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
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return;
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}
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if (fw_config_probe(FW_CONFIG(AUDIO, NAU88L25B_I2S))) {
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printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
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gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
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}
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
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@ -1,3 +1,10 @@
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fw_config
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field AUDIO 0 2
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option AUDIO_UNKNOWN 0
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option NAU88L25B_I2S 1
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end
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end
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chip soc/intel/alderlake
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chip soc/intel/alderlake
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device domain 0 on
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device domain 0 on
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device ref dtt on
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device ref dtt on
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@ -0,0 +1,10 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <chip.h>
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#include <fw_config.h>
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#include <baseboard/variants.h>
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void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
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{
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config->CnviBtAudioOffload = fw_config_probe(FW_CONFIG(AUDIO, NAU88L25B_I2S));
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}
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