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mainboard/intel/cannonlake_rvp: Disable SATA controller 

SATA was enabled only for internal testing. Since we do not use
SATA on chrome platforms, it can be disabled.

Change-Id: I907b440562b39e6d97f604e7e63b6b99e487aaa8
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/22875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Vaibhav Shankar 2017-12-14 11:04:21 -08:00 committed by Martin Roth
parent 621b022c3b
commit fd305156cd
2 changed files with 2 additions and 10 deletions
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6
src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
View File

@ -30,10 +30,6 @@ chip soc/intel/cannonlake
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)"
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)"
register "SataEnable" = "1"
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHda" = "1"
@ -95,7 +91,7 @@ chip soc/intel/cannonlake
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA
device pci 17.0 off end # SATA
device pci 19.0 on end # I2C #4
device pci 19.1 off end # I2C #5
device pci 19.2 on end # UART #2

6
src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
View File

@ -30,10 +30,6 @@ chip soc/intel/cannonlake
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)"
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)"
register "SataEnable" = "1"
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHda" = "1"
@ -101,7 +97,7 @@ chip soc/intel/cannonlake
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA
device pci 17.0 off end # SATA
device pci 19.0 on end # I2C #4
device pci 19.1 off end # I2C #5
device pci 19.2 on end # UART #2