treewide: Get rid of CONFIG_AZALIA_MAX_CODECS
Get rid of Kconfig symbol introduced at commit 5d31dfa8
High Definition Audio Specification Revision 1.0a says, there
are 15 SDIWAKE bits.
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Ib8b656daca52e21cb0c7120b208a2acdd88625e1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62202
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
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7f7ac206f8
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fd93cff329
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@ -527,14 +527,6 @@ config AZALIA_PLUGIN_SUPPORT
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bool
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bool
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default n
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default n
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config AZALIA_MAX_CODECS
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int
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depends on AZALIA_PLUGIN_SUPPORT
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default 3
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range 1 15
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help
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The maximum number of codecs supported on a single HD Audio controller.
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config AZALIA_LOCK_DOWN_R_WO_GCAP
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config AZALIA_LOCK_DOWN_R_WO_GCAP
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def_bool n
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def_bool n
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depends on AZALIA_PLUGIN_SUPPORT
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depends on AZALIA_PLUGIN_SUPPORT
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@ -50,7 +50,6 @@ int azalia_exit_reset(u8 *base)
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static u16 codec_detect(u8 *base)
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static u16 codec_detect(u8 *base)
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{
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{
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struct stopwatch sw;
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struct stopwatch sw;
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const u16 codec_mask = (1 << CONFIG_AZALIA_MAX_CODECS) - 1;
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u16 reg16;
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u16 reg16;
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if (azalia_exit_reset(base) < 0)
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if (azalia_exit_reset(base) < 0)
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@ -61,9 +60,9 @@ static u16 codec_detect(u8 *base)
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write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
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write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
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}
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}
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/* clear STATESTS bits (BAR + 0xe)[2:0] */
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/* clear STATESTS bits (BAR + 0x0e)[14:0] */
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reg16 = read16(base + HDA_STATESTS_REG);
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reg16 = read16(base + HDA_STATESTS_REG);
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reg16 |= codec_mask;
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reg16 |= 0x7fff;
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write16(base + HDA_STATESTS_REG, reg16);
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write16(base + HDA_STATESTS_REG, reg16);
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/* Wait for readback of register to
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/* Wait for readback of register to
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@ -86,9 +85,9 @@ static u16 codec_detect(u8 *base)
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if (azalia_exit_reset(base) < 0)
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if (azalia_exit_reset(base) < 0)
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goto no_codec;
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goto no_codec;
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/* Read in Codec location (BAR + 0xe)[2..0] */
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/* Read in Codec location (BAR + 0x0e)[14:0] */
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reg16 = read16(base + HDA_STATESTS_REG);
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reg16 = read16(base + HDA_STATESTS_REG);
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reg16 &= codec_mask;
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reg16 &= 0x7fff;
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if (!reg16)
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if (!reg16)
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goto no_codec;
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goto no_codec;
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@ -274,7 +273,7 @@ void azalia_codecs_init(u8 *base, u16 codec_mask)
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{
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{
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int i;
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int i;
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for (i = CONFIG_AZALIA_MAX_CODECS - 1; i >= 0; i--) {
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for (i = 14; i >= 0; i--) {
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if (codec_mask & (1 << i))
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if (codec_mask & (1 << i))
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azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size);
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azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size);
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}
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}
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@ -24,9 +24,6 @@ config PCH_SPECIFIC_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
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select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
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select SPI_FLASH
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select SPI_FLASH
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config AZALIA_MAX_CODECS
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default 4
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xd8000000
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default 0xd8000000
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@ -9,6 +9,3 @@ config SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select AZALIA_LOCK_DOWN_R_WO_GCAP
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select AZALIA_LOCK_DOWN_R_WO_GCAP
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help
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help
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Enable initialization of HDA codecs.
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Enable initialization of HDA codecs.
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config AZALIA_MAX_CODECS
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default 4 if SOC_INTEL_COMMON_BLOCK_HDA_VERB
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@ -37,9 +37,6 @@ config SOUTH_BRIDGE_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
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select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
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config AZALIA_MAX_CODECS
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default 4
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xfef00000
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default 0xfef00000
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@ -25,9 +25,6 @@ config SOUTHBRIDGE_INTEL_I82801GX
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if SOUTHBRIDGE_INTEL_I82801GX
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if SOUTHBRIDGE_INTEL_I82801GX
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config AZALIA_MAX_CODECS
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default 3
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xfef00000
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default 0xfef00000
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@ -24,9 +24,6 @@ config SOUTHBRIDGE_INTEL_I82801IX
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if SOUTHBRIDGE_INTEL_I82801IX
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if SOUTHBRIDGE_INTEL_I82801IX
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config AZALIA_MAX_CODECS
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default 4
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xfef00000
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default 0xfef00000
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@ -25,9 +25,6 @@ config SOUTHBRIDGE_INTEL_I82801JX
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if SOUTHBRIDGE_INTEL_I82801JX
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if SOUTHBRIDGE_INTEL_I82801JX
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config AZALIA_MAX_CODECS
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default 4
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xfef00000
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default 0xfef00000
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@ -33,9 +33,6 @@ config SOUTH_BRIDGE_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
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select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
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config AZALIA_MAX_CODECS
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default 4
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xfef00000
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default 0xfef00000
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@ -41,9 +41,6 @@ config INTEL_LYNXPOINT_LP
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help
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help
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Set this option to y for LynxPoint LP (Haswell ULT).
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Set this option to y for LynxPoint LP (Haswell ULT).
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config AZALIA_MAX_CODECS
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default 4
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config EHCI_BAR
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config EHCI_BAR
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hex
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hex
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default 0xe8000000
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default 0xe8000000
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