diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig new file mode 100644 index 0000000000..56b3a729c2 --- /dev/null +++ b/src/mainboard/google/trogdor/Kconfig @@ -0,0 +1,50 @@ + +config BOARD_GOOGLE_TROGDOR_COMMON # Umbrella option to be selected by variants + def_bool n + +if BOARD_GOOGLE_TROGDOR_COMMON + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_8192 + select COMMON_CBFS_SPI_WRAPPER + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_RTC + select EC_GOOGLE_CHROMEEC_SPI + select RTC + select SOC_QUALCOMM_SC7180 + select SPI_FLASH + select SPI_FLASH_WINBOND + select MAINBOARD_HAS_CHROMEOS + +config VBOOT + select EC_GOOGLE_CHROMEEC_SWITCHES + select VBOOT_VBNV_FLASH + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select VBOOT_MOCK_SECDATA + +config MAINBOARD_DIR + string + default google/trogdor + +config MAINBOARD_VENDOR + string + default "Google" + +config DRIVER_TPM_SPI_BUS + hex + default 0x5 + +config EC_GOOGLE_CHROMEEC_SPI_BUS + hex + default 0xa + +########################################################## +#### Update below when adding a new derivative board. #### +########################################################## + +config MAINBOARD_PART_NUMBER + string + default "Trogdor" if BOARD_GOOGLE_TROGDOR + +endif # BOARD_GOOGLE_TROGDOR_COMMON diff --git a/src/mainboard/google/trogdor/Kconfig.name b/src/mainboard/google/trogdor/Kconfig.name new file mode 100644 index 0000000000..425c9bfa95 --- /dev/null +++ b/src/mainboard/google/trogdor/Kconfig.name @@ -0,0 +1,4 @@ + +config BOARD_GOOGLE_TROGDOR + bool "Trogdor" + select BOARD_GOOGLE_TROGDOR_COMMON diff --git a/src/mainboard/google/trogdor/Makefile.inc b/src/mainboard/google/trogdor/Makefile.inc new file mode 100644 index 0000000000..d4bf30509f --- /dev/null +++ b/src/mainboard/google/trogdor/Makefile.inc @@ -0,0 +1,30 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2018 Google LLC +## Copyright 2019 The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +bootblock-y += memlayout.ld +bootblock-y += reset.c + +verstage-y += memlayout.ld +verstage-y += reset.c + +romstage-y += memlayout.ld +romstage-y += romstage.c +romstage-y += reset.c + +ramstage-y += memlayout.ld +ramstage-y += mainboard.c +ramstage-y += reset.c +ramstage-y += chromeos.c diff --git a/src/mainboard/google/trogdor/board_info.txt b/src/mainboard/google/trogdor/board_info.txt new file mode 100644 index 0000000000..2d1742bfc6 --- /dev/null +++ b/src/mainboard/google/trogdor/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Trogdor Qualcomm sc7180 reference board +Category: eval +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c new file mode 100644 index 0000000000..1e8857db97 --- /dev/null +++ b/src/mainboard/google/trogdor/chromeos.c @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +int get_write_protect_state(void) +{ + return 0; +} + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + +} diff --git a/src/mainboard/google/trogdor/chromeos.fmd b/src/mainboard/google/trogdor/chromeos.fmd new file mode 100644 index 0000000000..9af3d51cb8 --- /dev/null +++ b/src/mainboard/google/trogdor/chromeos.fmd @@ -0,0 +1,54 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License version 2 and +## only version 2 as published by the Free Software Foundation. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +FLASH@0x0 8M { + WP_RO 4M { + RO_SECTION 0x204000 { + BOOTBLOCK 96K + COREBOOT(CBFS) + FMAP@0x200000 0x1000 + GBB 0x2f00 + RO_FRID 0x100 + } + RO_VPD(PRESERVE) 16K + RO_DDR_TRAINING(PRESERVE) 8K + RO_LIMITS_CFG(PRESERVE) 4K + RO_FSG(PRESERVE) + } + + RW_VPD(PRESERVE) 32K + RW_NVRAM(PRESERVE) 16K + RW_DDR_TRAINING(PRESERVE) 8K + RW_LIMITS_CFG(PRESERVE) 4K + RW_ELOG(PRESERVE) 4K + RW_SHARED 4K { + SHARED_DATA + } + + RW_SECTION_A 1280K { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 256 + } + + + RW_SECTION_B 1280K { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 256 + } + + RW_LEGACY(CBFS) +} diff --git a/src/mainboard/google/trogdor/devicetree.cb b/src/mainboard/google/trogdor/devicetree.cb new file mode 100644 index 0000000000..d64ade4fce --- /dev/null +++ b/src/mainboard/google/trogdor/devicetree.cb @@ -0,0 +1,18 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License version 2 and +## only version 2 as published by the Free Software Foundation. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +chip soc/qualcomm/sc7180 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c new file mode 100644 index 0000000000..ce03ce1421 --- /dev/null +++ b/src/mainboard/google/trogdor/mainboard.c @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +static void mainboard_init(struct device *dev) +{ + +} + +static void mainboard_enable(struct device *dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .name = CONFIG_MAINBOARD_PART_NUMBER, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/trogdor/memlayout.ld b/src/mainboard/google/trogdor/memlayout.ld new file mode 100644 index 0000000000..74790f5404 --- /dev/null +++ b/src/mainboard/google/trogdor/memlayout.ld @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include diff --git a/src/mainboard/google/trogdor/reset.c b/src/mainboard/google/trogdor/reset.c new file mode 100644 index 0000000000..558f63d79f --- /dev/null +++ b/src/mainboard/google/trogdor/reset.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * Copyright 2019 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +/* Can't do a "real" reset before the PMIC is initialized in QcLib (romstage), + but this works well enough for our purposes. */ +void do_board_reset(void) +{ + google_chromeec_reboot(0, EC_REBOOT_COLD, 0); +} diff --git a/src/mainboard/google/trogdor/romstage.c b/src/mainboard/google/trogdor/romstage.c new file mode 100644 index 0000000000..718538728c --- /dev/null +++ b/src/mainboard/google/trogdor/romstage.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +void platform_romstage_main(void) +{ + /* QCLib: DDR init & train */ + qclib_load_and_run(); +}