Kconfig: Remove EXPERT mode

After much consideration, and many years of an EXPERT mode sitting
almost completely unused, we've seen that it doesn't work for us.
There is no standard on what constitutes EXPERT, and most of
coreboot's options Kconfig are expert-level.

We even joked that not selecting "EXPERT" should prevent coreboot
from compiling:

@echo $(shell whoami) is not permitted to compile coreboot

Change-Id: Ic22dd54a48190b81d711625efb6b9f3078f41778
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11365
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>

payloads/external/SeaBIOS/Kconfig

@@ -18,7 +18,6 @@ endchoice
 config SEABIOS_PS2_TIMEOUT
 	prompt "PS/2 keyboard controller initialization timeout (milliseconds)"
 	default 0
-	depends on EXPERT
 	int
 	help
 	  Some PS/2 keyboard controllers don't respond to commands immediately

src/Kconfig

@@ -22,14 +22,6 @@ mainmenu "coreboot configuration"
 
 menu "General setup"
 
-config EXPERT
-	bool "Expert mode"
-	help
-	  This allows you to select certain advanced configuration options.
-
-	  Warning: Only enable this option if you really know what you are
-	  doing! You have been warned!
-
 config LOCALVERSION
 	string "Local version string"
 	help
@@ -111,7 +103,6 @@ config CCACHE
 config FMD_GENPARSER
 	bool "Generate flashmap descriptor parser using flex and bison"
 	default n
-	depends on EXPERT
 	help
 	  Enable this option if you are working on the flashmap descriptor
 	  parser and made changes to fmd_scanner.l or fmd_parser.y.
@@ -121,7 +112,6 @@ config FMD_GENPARSER
 config SCONFIG_GENPARSER
 	bool "Generate SCONFIG parser using flex and bison"
 	default n
-	depends on EXPERT
 	help
 	  Enable this option if you are working on the sconfig device tree
 	  parser and made changes to sconfig.l or sconfig.y.
@@ -283,7 +273,6 @@ config BOOTBLOCK_SOURCE
 config SKIP_MAX_REBOOT_CNT_CLEAR
 	bool "Do not clear reboot count after successful boot"
 	default n
-	depends on EXPERT
 	help
 	  Do not clear the reboot count immediately after successful boot.
 	  Set to allow the payload to control normal/fallback image recovery.

src/device/Kconfig

@@ -51,7 +51,7 @@ config VGA_ROM_RUN
 	bool "Run VGA Option ROMs"
 	default n if PAYLOAD_SEABIOS
 	default y if !PAYLOAD_SEABIOS
-	depends on PCI && !MAINBOARD_DO_NATIVE_VGA_INIT && EXPERT
+	depends on PCI && !MAINBOARD_DO_NATIVE_VGA_INIT
 	help
 	  Execute VGA Option ROMs in coreboot if found. This is required
 	  to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS
@@ -92,7 +92,7 @@ config ON_DEVICE_ROM_RUN
 	bool "Run Option ROMs on PCI devices"
 	default n if PAYLOAD_SEABIOS
 	default y if !PAYLOAD_SEABIOS
-	depends on PCI && EXPERT
+	depends on PCI
 	help
 	  Execute Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
 
@@ -165,17 +165,12 @@ config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG
 config YABEL_VIRTMEM_LOCATION
 	prompt "Location of YABEL's virtual memory"
 	hex
-	depends on PCI_OPTION_ROM_RUN_YABEL && EXPERT
+	depends on PCI_OPTION_ROM_RUN_YABEL
 	default 0x1000000
 	help
 	  YABEL requires 1MB memory for its CPU emulation. This memory is
 	  normally located at 16MB.
 
-config YABEL_VIRTMEM_LOCATION
-	hex
-	depends on PCI_OPTION_ROM_RUN_YABEL && !EXPERT
-	default 0x1000000
-
 config YABEL_DIRECTHW
 	prompt "Direct hardware access"
 	bool

src/northbridge/amd/amdfam10/Kconfig

@@ -120,7 +120,7 @@ config SVI_HIGH_FREQ
 
 menu "HyperTransport setup"
 	#could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8)
-	depends on (NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
+	depends on (NORTHBRIDGE_AMD_AMDFAM10)
 
 choice
 	prompt "HyperTransport downlink width"

src/northbridge/amd/amdht/h3finit.c

@@ -1399,13 +1399,13 @@ static void selectOptimalWidthAndFrequency(sMainData *pDat)
 			cbPCBFreqLimit = ht_speed_mhz_to_hw(pDat->HtBlock->ht_link_configuration->ht_speed_limit);
 		cbPCBFreqLimit = min(cbPCBFreqLimit, cbPCBFreqLimit_NVRAM);
 
-#if CONFIG_EXPERT && CONFIG_LIMIT_HT_DOWN_WIDTH_8
+#if CONFIG_LIMIT_HT_DOWN_WIDTH_8
 		cbPCBABDownstreamWidth = 8;
 #else
 		cbPCBABDownstreamWidth = 16;
 #endif
 
-#if CONFIG_EXPERT && CONFIG_LIMIT_HT_UP_WIDTH_8
+#if CONFIG_LIMIT_HT_UP_WIDTH_8
 		cbPCBBAUpstreamWidth = 8;
 #else
 		cbPCBBAUpstreamWidth = 16;