soc/intel/skylake: Calculate soc reserved memory size
This patch implements soc override function to calculate reserve memory size (PRMRR, TraceHub, PTT etc). System memory should reserve those memory ranges. BRANCH=none BUG=b:63974384 TEST=Ensures DRAM based resource allocation has taken care of intel soc reserved ranges. Change-Id: I19583f7d18ca11c3a58eb61c927e5c3c3b65d2ec Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21540 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -255,7 +255,7 @@ static size_t calculate_reserved_mem_size(uintptr_t dram_base,
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* the base registers from each other to determine sizes of the regions. In
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* other words, the memory map is in a fixed order no matter what.
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*/
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static uintptr_t calculate_dram_base(void)
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static uintptr_t calculate_dram_base(size_t *reserved_mem_size)
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{
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uintptr_t dram_base;
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const struct device *dev;
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@ -271,15 +271,34 @@ static uintptr_t calculate_dram_base(void)
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dram_base -= calculate_traditional_mem_size(dram_base, dev);
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/* Get Intel Reserved Memory Range Size */
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dram_base -= calculate_reserved_mem_size(dram_base, dev);
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*reserved_mem_size = calculate_reserved_mem_size(dram_base, dev);
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dram_base -= *reserved_mem_size;
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return dram_base;
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}
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/*
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* SoC implementation
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*
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* SoC call to summarize all Intel Reserve MMIO size and report to SA
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*/
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size_t soc_reserved_mmio_size(void)
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{
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size_t chipset_mem_size;
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calculate_dram_base(&chipset_mem_size);
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/* Get Intel Reserved Memory Range Size */
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return chipset_mem_size;
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}
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/* Fill up memory layout information */
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void fill_soc_memmap_ebda(struct ebda_config *cfg)
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{
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cfg->tolum_base = calculate_dram_base();
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size_t chipset_mem_size;
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cfg->tolum_base = calculate_dram_base(&chipset_mem_size);
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}
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void cbmem_top_init(void)
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